"Making" an L2 Cache SIMM for a 5260

[eraser]

I am looking for an L2 cache module for my PowerMac 5260. To cut costs Apple released these machines with no L2 cache (which I presume considerably hurt performance) but luckily they left a slot available for upgrade later. The problem is that very few people actually bought the cache module making them difficult to find. The PowerMac 6200/5200 (same motherboard) uses this same cache slot for both its cache and its ROM. After looking at a combination ROM/cache module for a 5200/75 LC I got an idea.

The 5200 and 5260 effectively share a motherboard. The only difference is that a few chips have been updated and generally the 5260 has the ROM on the board and has either a 603e @ 100 MHz or 120 Mhz instead of a 603 @ 75 MHz.

There are 3 modules I am aware of that were made for these Macs:

- L2 Cache + ROM = This module was shipped with many PowerMac 6200 and 5200 units. It contains 256K L2 cache (8 chips) on one side and 4 MB of system ROM (4 chips) on the other side. This module will not work in a PowerMac 5260 apparently because of a ROM conflict.

- ROM only = This module contains only the 4 Apple ROM chips. I notice that comparing the ROM module to the combination module that most of the pins seem to effectively be unused or routed to other pins.

- L2 Cache only = This is the module I am looking for. I assume it contains only the cache chips and no ROM. Apple refers to this as a SIMM (as opposed to a DIMM) meaning that the contacts on each side of the module are redundant.

So my idea: take one of the L2 Cache + ROM modules from a 5200 and desolder the Apple ROM, leaving only the L2 cache side populated. In theory this would let the machine see the cache but there would be no ROM conflict.

Thoughts?

 

[Charlieman]

On the combination ROM/Cache module I presume that the majority of pins are active. On the Cache Only module, I presume that fewer pins are active.

If you can identify which pins are for the ROM function, you can disable them. That would leave you with a ROM/Cache module on which the ROM is disabled and the Cache is active. Are the pinouts in a developer note somewhere?

 

[eraser]

On the combination ROM/Cache module I presume that the majority of pins are active. On the Cache Only module, I presume that fewer pins are active.

Agreed.

If you can identify which pins are for the ROM function, you can disable them. That would leave you with a ROM/Cache module on which the ROM is disabled and the Cache is active.

Unfortunately the PCB is multilayered so I can't follow all of the traces from the pins. It might actually be easiest to desolder the ROM than try to disable the ROM pins. I just hope that there isn't anything I would be overlooking if I did that. There do seem to be a lot of 'dead end' traces on the ROM-only module so I hope that the machine will just ignore the lack of ROM on my 'frankenmodule' like it overlooks the lack of cache on the ROM-only module.

Are the pinouts in a developer note somewhere?

That is a very good question and the answer would be incredibly helpful. Does anyone know where I might find this? I have some old Apple developer docs that I can search through and see if I can find something useful.

 

[Dennis Nedry]

A pinout may actually be necessary either way. It is possible that there is a connection that signals to the Mac that this module contains ROM. Removing the ROM chips would not affect such a signal.

It may also be possible to find a pinout for the ROM chips themselves and simply disconnect a pin that enables output, ex. /OE, /CE, etc. With this method, it may be necessary to tie the disconnected pins to a logic level, most likely high, but unofficially, disconnecting will probably work. This can prevent removing the entire chip which is extremely difficult without proper tools.

If you can't find a rom chip pinout, many roms use the same pinouts, so with a little experimenting you'll likely figure it out.

 

[eraser]

I did discover that the module I thought was a ROM-only was actually a cache module for a different PowerMac. I made the mistake because the cache chips from some Macs are the same size and pin number as the ROM chips on this Mac. I was looking up the specs on each of the chips and found that each side of the module I want to modify seems to be self-contained. The cache size contains 8 chips which I have confirmed are 16K high speed memory chips as well as a another one which turned out to be a "Fast CMOS 1-of-8 decoder" presumably to unify the 8 cache chips.

It may also be possible to find a pinout for the ROM chips themselves and simply disconnect a pin that enables output, ex. /OE, /CE, etc. With this method, it may be necessary to tie the disconnected pins to a logic level, most likely high, but unofficially, disconnecting will probably work. This can prevent removing the entire chip which is extremely difficult without proper tools.

I'm having trouble finding the pinouts. I did find that the ROM chips on this logic board are on the underside. They are actually directly below the L2/ROM slot and it looks like they share the connectors that also go to the L2 slot? At first it seemed a bit odd to me that the connectors they soldered the ROMs to would continue to go to the L2 slot rather than stop them at the ROM chips ... but then again it might have been more work for them to rework the slot. It does explain why the Mac won't boot with the ROM/L2 cache chip in place. When it tries to boot and call the ROM there are two conflicting replies from the two sets of chips.

Luckily I do have the hardware to remove the entire chip so I don't expect it to be a big deal. Hopefully when I get some time I can experiment with this soon and make my module and see what happens.

The real question is how much of a risk am I running by playing with my 'franken-module'? Should I look for a 'test' 5260 logic board for when I try this? It seems fairly safe as long as there are no solder bridges but I don't want to overlook anything.

 

[eraser]

I have confirmed are 16K high speed memory chips

Correction: 32K chips

 

[LCGuy]

If its any help, I once installed a NuBus PowerMac Cache SIMM (from an 8100, actually) in my 5260 to see if it would work. It doesn't do any damage...but it also doesn't work either.

 

[Trash80toHP_Mini]

The L2 Slot carries enough signal and addressing lines that the entire computer can be run from it as in the case of the Crescendo 1 MB L2 G3/466 in my 6360. IIRC, the PCI architecture version of "Designing Cards and Drivers for the Macintosh Family Hardware" (?) is available in .PDF format on a Developer CD. All my books are still packed in boxes from my recent move, so I can't check ATM. Designing a new CACHE DIMM would probably be easier than converting a ROM DIMM.

OOPS! Shoulda' mentioned that it's a DIMM module up front! That's why the signals on the two sides are independent of the opposite side.

 

[eraser]

OOPS! Shoulda' mentioned that it's a DIMM module up front! That's why the signals on the two sides are independent of the opposite side.

Indeed. The 5260 uses a SIMM.

 

[trag]

One thing to look out for when fitting a ROM/cache module in a machine which already has ROM is that the module does not disable the on-board ROM.

Apple has a pretty clever scheme it uses in some machines. The CE_ (chip enable; active low) pins of the on-board (logic board) ROMs are tied low through a large resistance. The CE_ pins also connect to a pin in the ROM slot. In order to disable the logic board ROMs, all the ROM module must do is connect the logic-board-ROM-CE_ pin to +5 (or +3.3V for later machines) with less resistance than was used to ground the pins. This causes CE_ on the logic board ROM to go high and the logic board ROM chips are disabled.

I do not know if Apple used this particular scheme on the machine you're looking at, but you should check, as it would prevent any ROM/Cache module from working in your machine, no matter what you do to the ROM on the module.

Typically, you won't be able to find pinouts or even model numbers for the ROMs. However, if you look up equivalent capacity Flash or EEPROM in the same package, the pinout will be the same as they follow JEDEC standards, which will allow you to identify the CE_ pins on the ROM chips.

Also, the cache and ROM chips are likely to share address and data lines on the module. I think some of the earlier discussion was puzzled by this. Until you get to PPCs with lookaside or backside caches, the cache is using the same address and data lines as the main busses and so they're going to share those resources. It's possible that the address lines might be decoded through different hardware and so the address lines not shared, but the data lines are almost certain to be shared as a bus by the cache and ROM.

 

[eraser]

I do not know if Apple used this particular scheme on the machine you're looking at, but you should check, as it would prevent any ROM/Cache module from working in your machine, no matter what you do to the ROM on the module.

I suspect the only way to find this out is going to be to try it and see what happens?

 

[Trash80toHP_Mini]

OOPS! Shoulda' mentioned that it's a DIMM module up front! That's why the signals on the two sides are independent of the opposite side.

Indeed. The 5260 uses a SIMM.

Sorry, I was sleepy and misread "redundant" as "independent" and ASSuMEd that your 5260 shared the same type of MoBo as my 6360. :I

Way too many model names/numeric designations and far too many RoadApples in that era of Desktops & AIOs for my old noggin' to keep straight! :-x

 

[Bunsen]

Anything helpful here?

http://www.macgurus.com/products/motherboards/mbppc5200.php

 

[trag]

I suspect the only way to find this out is going to be to try it and see what happens?

The best way to figure it out is to identify the CE_ pins on the ROMs and then take an ohmmeter and figure out what they're connected to. Check the CE_ pins against all the pins in the cache/rom slot. Check the CE_ pins vs. GND and vs. +5/+3.3. Install a cache/ROM module and test the resistance again (no power necessary).

Simply trying it seeing what happens doesn't tell one enough. If it doesn't work, there could be many different causes. This will eliminate the possibility of one specific potential failure.

 

[eraser]

Anything helpful here?http://www.macgurus.com/products/mother ... pc5200.php

Yeah; thanks. I found this site a bit ago and was originally looking for the 'cross-reference' between Apples catalog number (M4849LL/A) and the actual part number on the chip. I finally discovered that it was 820-0754-A. If anyone rummaging through their parts drawer stumbles on one of these please let me know as it would save me a bit of trouble.

Apple has a pretty clever scheme it uses in some machines. The CE_ (chip enable; active low) pins of the on-board (logic board) ROMs are tied low through a large resistance.

Do you happen to recall which Mac(s) used this method?

One thing that gives me hope is that the older revisions of this motherboard explicitly say "ROM/Cache" next to that socket. The revision of the 5260 has the word "ROM" removed. It only says "Cache." Of course the Apple documents that reference this machine use identical diagrams (even the website above does) and leave the "ROM" phrase there. That makes sense of course since the boards are pretty much the same except for a few revised ICs and different CPUs. Flipping the board over it looks like they just soldered the ROM chips to the appropriate pins beneath that slot and I really hope that is all they did (the quick and dirty way) on this Mac. Unfortunately I don't have my hands on a real cache module so I don't even know exactly what it looks like or how it might be wired.

And thanks all for the help and discussion.

 

[beachycove]

Two on eBay just now: http://cgi.ebay.ca/Two-Apple-L2-Cache-Module-5260-5300-6300-/300498579983?pt=LH_DefaultDomain_0&hash=item45f71c720f .