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Quadra 950 ... Mostly Dead

techknight

Well-known member
either the IC is bad, or there is noise on the bus. And that can be EITHER side of the bus, internal system bus, or external bus.

but it sounds like the chip itself is bad, or the decoupling capacitor on that IC is bad.

 

mcdermd

Well-known member
The IC is fine - I swapped it with the same results. All of the capacitors are tantalum or ceramic (no electrolytics) and none look burnt.

It's times like this I wish I had schematics.

 

techknight

Well-known member
it doesnt matter if it looks burnt or not. it can still be open ;-)

You have a bus problem. either one of the ASICs is bad, or the decoupling/termination on the bus interconnect is bad.

Look at the datasheet of the IC, from there you can find out what the address/data lines are. and see if they tie together between the two SCSI ICs (they should), and see if they tie to any other IC. the chip selection should be done by the chip enable which i wouldn't worry about that.

if your having failure from one IC, and not the other. measure the address/data connection between both, they should be in parallel and the chip/output enable selection lines should be the only thing that differentiate the two on the main bus.

 

CC_333

Well-known member
Does anyone know how to achieve this "diagnostic test" on a Quadra 840?

Also, is it possible to connect it to another old Mac with serial ports, like, say, a Beige G3 running OS X 10.1 (for Terminal), and do the tests without an adapter?

It looks quite interesting, and I hope it allows you to get the board working!

c

 

mcdermd

Well-known member
You could use zterm or any other terminal emulator you can read from the serial port on. I used Terminal because it was already there on my 10.6 MacBook. just remember to set it to 9600 baud, 8 bits, no party and 2 stop bits.

As bbraun said, check which is the PA0 pin of your VIA1 chip (mine was pin 2). Use a continuity tester to see if it goes to an edge connection on the logic board that you can send to ground. If not, you may try grounding it from the chip itself.

 

mcdermd

Well-known member
Look at the datasheet of the IC, from there you can find out what the address/data lines are. and see if they tie together between the two SCSI ICs (they should)
I don't get continuity on the address or data lines between the chips themselves, only the Vss lines.

 

techknight

Well-known member
that woudl tell me that either they are buffered independantly (using 74 series logic, or an ASIC), or they are on completely separate databusses (i doubt it)

 

bbraun

Well-known member
I'm traveling for a couple days, so I apologize for the infrequency of my posts.

The test is loading the loop count, then issuing a DMA NOP command to load the count and read it back. Since the DMA is a NOP, there should have been no bytes DMA'd, so the count should be the same. The DACK/ and/or ACKO/ lines of the 53C96 will decrement the count. These aren't 68040 signals, so I'm going to guess they go to the memory controller.

The part I'm still hung up on is it's supposedly the high byte of the 2 byte count. Since it increments by 5, and none of the expected values reported by the error code are multiples of 5, this makes some sense. At least it indicates to me I'm not confusing the LSB and MSB failure codes. The 0x03 test case is a FIFO reset error, and doesn't have the expected/actual value codes, so I don't think I'm off by one on the test code.

The count is also loaded 8bits at a time, so it shouldn't even be a problem with the higher data lines. It's using the same data lines to load both the high and low bytes.

So, if it is a DACK/ or ACKO/ signal problem, I'm at a loss as to why it seems to only be happening when the count gets fairly high.

 
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