Proper Mac Plus ROM split HI/LO

[Mu0n]

Trying to get back my 2nd Mac Plus up and running again, I've received an EEPROM programmer and I'm prepping some Winbound W27C512 ICs. Have I done the split right? Every other byte are split like so:

LO:



HI:

 

[dochilli]

I am not sure, if I am right, but your Hi looks like a file that is named low on my computer and your low looks like my Hi.

What is the chiptext on the roms where you got the hi and low from (0342-341 c and 0342-342 b) ?

Can you attach the files? Then I can test them to differences with my ROM-Files.

 

[Mu0n]

I am not sure, if I am right, but your Hi looks like a file that is named low on my computer and your low looks like my Hi.

What is the chiptext on the roms where you got the hi and low from (0342-341 c and 0342-342 b) ?

Can you attach the files? Then I can test them to differences with my ROM-Files.

Thanks! I just used the software's way of doing things (and I can see how people's expectation of where the HI and LO are different), but I'll do that when I get back home.

 

[Gorgonops]

Perhaps the software you're using has an Endian disagreement with the Motorola 68000. (IE, perhaps the software assumes little-endian hi/low, in which low would be the first physical byte, but the Mac ROMs assume "high" is the first of each 16 bit word.)

As long as you're correctly getting even/odd byte distribution you should be fine burning your ROMs with it split either way, it's just the terminology that's confused. Just plug them in after flashing and if they don't work first time swap them.

 

[Mu0n]

@dochilli here are the files. I named them "allegedlyLO" and "allegedlyHI"

View attachment allegedlyHI.BIN

View attachment allegedlyLO.BIN

 

[Mu0n]

Welp, I couldn't wait so I tried swapping them.

First 15 seconds: garbled stripes pattern (I'm getting this with my less fussy Mac Plus as well post-recap job. I'm not sure what causes this in either machine)

Then a Beep and grayscale screen for another 15 seconds (this is an improvement! When I started this summer, the bad ROM chips this Mac had gave me a sad mac)

Then the insert disc icon! 

It boots archon!

I made my 2 year old daughter listen to the wicked intro tune.

WOO, finally a win after so many dead-ends on several projects this summer!

 

[dochilli]

Your ROMs are identical to the 0341-342 C and 0342-342 B and this is Rev. 3.

I think you should recap your analog board. The voltages may be unstable because the caps have leaked.

Check the voltages at the floppy port! Must be 5V, 12V and -12V.

 

[Mu0n]

I *have* recapped the analog board in June. The pattern + long delay appeared after the logical board recap which I did after.

 

[dochilli]

I did not recap any of my plus LBs. Leaking caps are often a problem of the compact macs after the SE.

Did you check the voltages?

 

[Mu0n]

I did not recap any of my plus LBs. Leaking caps are often a problem of the compact macs after the SE.

Did you check the voltages?

Yeah, I did check them at the start of the summer when I used to only get a straight sad mac, and they were normal then.

I checked them again and I'm getting 11.97V and 5.06V at the very start.

The boot sequence was much shorter this time.

 

[Mu0n]

Also, according to this : pin 5 is the one at -12 V (one space to the right of the 5V according to your picture)

http://myoldmac.net/FAQ/MacintoshPlus-Pinouts.php

 

[Gorgonops]

I haven't taken even the slightest look at the Mac Plus schematic to base this idea on, but I wonder if your some-odd-seconds of screen corruption before it clears and proceeds with booting could be that there's something up with the processor reset circuity. Typically computers of this vintage have some sort of timing delay circuit that waits a discrete period of time after power-up before pulling the RESET signal to officially start the CPU running. (Until this point the circuitry typically holds the line as if a "reset button" was being held down, halting the CPU.) If for some reason that circuit is having trouble stabilizing it could be holding the CPU in a halted state for some random period of time.

Throwing this out there because I saw something like this on a Commodore PET I was restoring years ago. (Fixed by replacing a bad *ceramic disk* capacitor.) PET used a simple 555 timer to hold reset for about a second after power on.