So is a Quadra 840AV with 512MB (128x4).
Really? I've tried 128 meg SIMMs in various Quadras, but I had no idea that the Q840AV actually works with 128 meg SIMMs... Nice!
Is this a machine you have / use?
The Q840AV does not work with 64MB nor 128MB SIMMs in my tests. It is possible that Franklinstein had some very differently organized SIMM, but that seems farfetched.
My experiments indicated that the Q840AV and the 7100 and 8100 do not recognize column, nor row addresses above 11 wires. So 11 + 11 bits is 22 bits or 4M addresses. A 72 pin SIMM is 4bytes wide, so one gets 16MB or addressable memory per bank in those machines and dual bank SIMMs can be 32 MB.
In my tests, 64 MB SIMMs are seen as 16MB and 128MB are seen as 32 MB in the above mentioned machines.
Now the 6100 will address 12 X 12 memory chips and it uses the same memory controller as the 7100 and 8100, so one might doubt my results. I was puzzled by this, so I traced the upper address line and the RAS lines back from the SIMM sockets in these machine. In the 6100 those lines go directly back to the memory controller (well, through buffers). In the 7100 and 8100 the upper address line and the RAS signals all pass through a CPLD before going to the memory sockets. My guess is that Apple did not build the memory controller with enough RAS lines to control multiple SIMM sockets. So they translate the RAS lines and upper addresses into multiple RAS lines in the CPLD and use that to support multiple SIMM socket banks.
The Q840AV appears to use the same addressing scheme as the x100 family, which is not surprising because they were so close to each other in development.