@zone66x Wow, this looks like a great project. It would be good if we can totally relocate the ROM and also the SCSI chip and framebuffer pointers to make room for a bunch of contiguous RAM.
@Snial Oops didn't see your post. This is good progress! But we still face the big task of modifying the memory manager to allocate RAM at $400000 and above. I think while figuring that out we might figure out how to insert the gap without using an app, per se. Good work nonetheless!!
I've just finished a new board revision of my accelerator which should be the final production version. On this version, I have added the ability to remap the high-order four bits of any address as it goes from the accelerator card to the bus on the motherboard. This is better than before where it could just remap the top two bits.
So for example if we can relocate the ROM and rewrite some of the pointers, we could move the ROM to $800000-$8FFFFF and the SCSI to $C80000-$CFFFFF. This would free up all 8 MB at the bottom of the address map and we could map motherboard RAM to $400000-$7FFFFF. In that case the screen/sound buffers would be at $7Fsomething and we would have rewrite the pointers for them too.
Otherwise if we are working with the SE ROM and the "gap" type solution, the 4-bit remapping lets us put any aligned megabyte of motherboard RAM at any arbitrary megabyte boundary. With the previous 2-bit remapping, it wasn't possible to access the memory at $100000-$17FFFF on the motherboard since SCSI, SCC read/reset, and IWM were at all the locations that could map to $100000-$17FFFF.
Unfortunately due to an abundance of caution on my part, the remapping functionality is gonna be disabled in hardware on the first production units. Adding the pins to do the remapping functionality would use a fair bit (~2.5%) of the logic resources in the CPLD and I don't wanna run out of room in case some issues need patched. Plus the extra RAM will be slow. So on the production units, the jumpers required to use the extra RAM will be removed. But I can make some prototypes with the address remapping function enabled and we can try to get a relocated ROM booting. Once we are fairly confident that there are no bugfixes we need to make and if there's room in the CPLD, we can add back the remapping.
@Snial Oops didn't see your post. This is good progress! But we still face the big task of modifying the memory manager to allocate RAM at $400000 and above. I think while figuring that out we might figure out how to insert the gap without using an app, per se. Good work nonetheless!!
I've just finished a new board revision of my accelerator which should be the final production version. On this version, I have added the ability to remap the high-order four bits of any address as it goes from the accelerator card to the bus on the motherboard. This is better than before where it could just remap the top two bits.
So for example if we can relocate the ROM and rewrite some of the pointers, we could move the ROM to $800000-$8FFFFF and the SCSI to $C80000-$CFFFFF. This would free up all 8 MB at the bottom of the address map and we could map motherboard RAM to $400000-$7FFFFF. In that case the screen/sound buffers would be at $7Fsomething and we would have rewrite the pointers for them too.
Otherwise if we are working with the SE ROM and the "gap" type solution, the 4-bit remapping lets us put any aligned megabyte of motherboard RAM at any arbitrary megabyte boundary. With the previous 2-bit remapping, it wasn't possible to access the memory at $100000-$17FFFF on the motherboard since SCSI, SCC read/reset, and IWM were at all the locations that could map to $100000-$17FFFF.
Unfortunately due to an abundance of caution on my part, the remapping functionality is gonna be disabled in hardware on the first production units. Adding the pins to do the remapping functionality would use a fair bit (~2.5%) of the logic resources in the CPLD and I don't wanna run out of room in case some issues need patched. Plus the extra RAM will be slow. So on the production units, the jumpers required to use the extra RAM will be removed. But I can make some prototypes with the address remapping function enabled and we can try to get a relocated ROM booting. Once we are fairly confident that there are no bugfixes we need to make and if there's room in the CPLD, we can add back the remapping.
