Thanks Elfen, olePigeon -- Turns out the SIMMS I had were composite-- I read somewhere that Apple did not recommend composite memory.
If the SIMMs just had two 4M X 4 chips on them, then they were not composite SIMMs. Composite SIMMs are SIMM which were built with memory chips of too small of a capacity for the SIMM. Additional circuitry (typically a PLD) is necessary on composite SIMMs to handle the addressing of higher memory addresses adn switch between the banks of small capacity memory parts on the SIMM.
For example, if you attempted to build a 16MB SIMM out of those 4M X 4 parts. You'd be building a 16M X 8 SIMM; 16M addresses and 8 bits of width in the data path.
But the 4M X 4 chips only have 4M addresses per chip. So you take eight of them, arrange them in four pairs and you have (4M X 8 ) + (4M X 8 ) + (4M X 8 ) + (4M X 8 ) = 16M X 8. However, the 4M chips don't have any built-in method of accepting 16M addresses.
So you add a PLD which accepts the upper few address pin and translates them into a Bank Select (Chip Select) signal and then the output of the PLD activates one of those 4M X 8 banks for each memory operation.
That's a composite SIMM.
The 2-chip SIMMs are also known to be problematical, but not because they're composite.
And, in fact, it raises an interesting question. Anyone know why 2-chip SIMMs are problematical? I think I read something about an obscure refresh logic issue, but memory also says that may have been the problem with the IIx and larger than 1MB SIMMs, not the problem with 2-chip SIMMs.
Logically, 2-chip SIMMs should work.
Personally, I wonder if 2-chip SIMMs underload the address and/or control signals on the logic board and because there are not enough chips there to sink enough current, the signal(s) ring and ruin the signal integrity on the memory bus.
If that's the case, adding some small resistors on the address and/or control lines should fix the problem. Basically, I suspect that when using 2-chip SIMMs, the memory bus needs to be terminated.
