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Daynaport E/si30 cloning - ROM needed (or details about it)


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Hi, I've looked a bit into options to DIY an Etherner adapter for SE/30. My attention was caught by Daynaport, e.g. one pictured here:

It looks relatively easy to reverse engineer as it is based on a SONIC DP83934 chip which does basically everything including the Twisted Pair interface. It also conveniently interfaces with 68k processors as described in the Technical Note AN-691. The tech note also includes GAL equations (basically the address decoder for ROM and the SONIC IC).

 

Now the questions:

- Does anyone have a ROM dump for this kind of Daynaport or any card using the SONIC DP8393* family for SE/30?

- What exactly would need to sit in the Declaration ROM? I'm still trying to understand the pseudo-NuBus implementation of SE/30. What would happen if the ROM would be empty? Would the Dayna driver not work at all? What about interrupts, are they used at all? And what is the role of the driver stored in ROM? Sorry for noob questions, but I'm trying to wrap my mind around the complexity here (do I need an exact dump or is it possible to develop something on my own?)

- GAL equations are relatively clear, probably the only questions remains about the address space - will Dayna also use $F9 as in the tech note?

 

Thanks for your help :) As with my Classic II FPU card, I will be happy to share all design files with the 68kmla community.

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Posted (edited)

From skimming over the datasheet it looks like that controller chip does DMA/bus mastering. Be aware that this might not work very well (say: not at all) when used together with most accelerators.

 

Good info on declaration ROMs here on bbrauns site:

http://www.synack.net/~bbraun/declrom.html

 

If you leave the declaration ROM empty the card would depend on a software driver to woro at all.

Depending on how that driver is implemented it might or might not work without one.

If the original card had one, the driver most likely will look for one though ;)

 

You can choose any of the available slot IDs, it doesn't necessarily have to be $F9. You can control the slot ID from the decoder GAL.

The only thing you would have to do is to hook up the slot IRQ signal accordingly to match your decoded ID.

Edited by Bolle
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19 hours ago, Bolle said:

From skimming over the datasheet it looks like that controller chip does DMA/bus mastering. Be aware that this might not work very well (say: not at all) when used together with most accelerators.

Thanks @Bolle. Did you ever had a chance to use the original DaynaPort with any accelerator? Have you heard about issues?

And do you actually now more about the Declaration ROM of network adapters? What is supposed to be contained there beyond the standard device info?

 

19 hours ago, FunnymanSE30 said:

I have one, I'm missing the daughterboard though, how would I go about dumping the Rom?

That would unfortunately require to desolder the chips or at least connect over their pins. I will send you a PM, maybe we can find a way to somehow organize that.

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19 hours ago, moldy said:

Did you ever had a chance to use the original DaynaPort with any accelerator?

Nope, I don't have one of those Dayna cards.

The Micromac Carrera manual for example explicitly states that no ethernet cards based on the SONIC-T will work with it because the accelerator makes itself the bus master and won't accept any other bus requests.

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19 hours ago, Bolle said:

Nope, I don't have one of those Dayna cards.

The Micromac Carrera manual for example explicitly states that no ethernet cards based on the SONIC-T will work with it because the accelerator makes itself the bus master and won't accept any other bus requests.

What about DP83901AV in Asante MacCon cards? Is this also not supported? The datasheet says it can also act as a bus master while in the DMA mode.

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That one will work when used in peripheral mode - which is the case on the MacCon. You need a lot more external logic though to interface it to the 030 bus because the 83901 uses a multiplexed bus interface.

A minimum of two GALs, one for address decoding, another one to control the bus multiplexing. Declaration ROM will be needed just like with the 83934.

You'll also need some SRAM for the controller to buffer frames until the driver loads them from the SRAM. Interrupts are used in this case so you hopefully won't run out of buffer storage.

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19 hours ago, Bolle said:

For the 83901 this is how it's done on the MacCon IIsi/30

 

 

 

Thanks a lot! That should be an interesting study material for few evenings :)

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Found a Dayna DP83934 Commslot card in my pile of cards.

Reading those old 82S123 bipolar PROMs is a pain:

 

DAYNA.BIN

 

I would guess the declaration ROMs are the same on the other Dayna cards.

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