Bolle Posted January 15 Report Share Posted January 15 2 hours ago, mg.man said: Are you sure? The oscillator is 20Mhz The oscillator is only connected to the FPU. The CPU is hardwired for 16MHz. 2 hours ago, mg.man said: that memory expansion does look like a later one... v1.2... How many flavors of these did they actually make? According to a product catalog from back then which I saw somewhere on archive.org the Mercury never did more than 4MB. While we're at it: Total Systems Mercury.zip Totally not tested and schematics have not been cleaned up for readability. Most parts values missing, you'll have to source those from the pictures. GAL files are however correct and tested. Quote Link to post Share on other sites
mg.man Posted January 15 Report Share Posted January 15 2 hours ago, Bolle said: The CPU is hardwired for 16MHz. Good to know... Speaking of while we're at it... I recently acquired a Gemini 030 in a sad state... it's configured for an SE, but it doesn't appear to be working... all I get when powering up is this... no "bong", no pointer... I suspect it's because one of the GAL? chips is missing [U4, upper left] (but really have no idea)... Open to any suggestions or happy to send to you if you want / have time to take a look... Does the file you attached include GAL details for the Gemini? Quote Link to post Share on other sites
Bolle Posted January 15 Report Share Posted January 15 2 hours ago, mg.man said: Does the file you attached include GAL details for the Gemini? Nope, those files won't help you there. If the GAL in that open spot is indeed needed I'd say there's not much I can do for you without another one of those which has the needed GAL in place to make a copy. Seeing you've got the power connector on there though makes me wonder if you need a secondary power supply hooked up to get it to work at all. Can you meter out if the VCC pins on the PDS connector are even connected to any components on the accelerator? On the Mercury there are several jumpers to select different power sources... In the SE it would be obvious to have everything powered through the PDS connector. On the Plus you can choose to get power through the 68000 clip or an external power supply. It's the same with Quik30 I got in my Classic which needs a secondary power supply to work at all as there is no power supplied to the accelerator through the clip that goes onto the logicboard CPU. Quote Link to post Share on other sites
mg.man Posted January 15 Report Share Posted January 15 (edited) 2 hours ago, Bolle said: Nope, those files won't help you there. Yeah... I d/l'd and saw they were Mercury-specific... drat! 2 hours ago, Bolle said: not much I can do for you without another one Feared that as well... I know a couple of MLA'rs have one of these... but set up for a Plus - the ones I've seen do have a chip at U4. My only hope is that it's only required in "Plus" mode... but that's likely a wild hope... 2 hours ago, Bolle said: makes me wonder if you need a secondary power supply hooked up to get it to work at all. Yeah... I've been wondering that too... I'll see if I can do some probing... Thanks for the info / suggestions! Edited January 15 by mg.man Quote Link to post Share on other sites
mg.man Posted January 15 Report Share Posted January 15 Doesn't look like it's a VCC issue... compared this 'board to my [working] Mercury 030 and the +5V pins from the PDS are carried onto the 'board. In fact, they are connected to the two right-most pins of the power connector... Quote Link to post Share on other sites
CharlieFrown Posted January 15 Report Share Posted January 15 another clever idea - Raspberry Pi emulates really fast 68000 CPU with huge chunk of memory while the rest of original hardware works as usual https://twitter.com/Claude1079/status/1330154148113887234 Quote Link to post Share on other sites
Kai Robinson Posted January 16 Report Share Posted January 16 Uploading this, for those that might be interested in a 68020 accelerator design. Wireless World, July 1987 - 68020 cache design.pdf Quote Link to post Share on other sites
trag Posted January 17 Report Share Posted January 17 19 hours ago, Kai Robinson said: Uploading this, for those that might be interested in a 68020 accelerator design. Wireless World, July 1987 - 68020 cache design.pdf 396.21 kB · 5 downloads Nice find. Thank you for posting it. Quote Link to post Share on other sites
Kai Robinson Posted January 19 Report Share Posted January 19 And this article, too...plenty of information for the basics, there. 68020 Coprocessors.pdf Quote Link to post Share on other sites
CharlieFrown Posted February 2 Report Share Posted February 2 https://amitopia.com/new-buffee-amiga-accelerator-is-aiming-at-reaching-1000-mips/ 3.2 GHz 68030 anyone? Quote Link to post Share on other sites
rplacd Posted February 3 Report Share Posted February 3 On 2/2/2021 at 11:56 AM, CharlieFrown said: https://amitopia.com/new-buffee-amiga-accelerator-is-aiming-at-reaching-1000-mips/ 3.2 GHz 68030 anyone? I don't know much about either the Amiga or what they're trying to intend to do, but isn't that going to be bottlenecked by... everything else? Quote Link to post Share on other sites
uyjulian Posted February 3 Report Share Posted February 3 4 hours ago, rplacd said: I don't know much about either the Amiga or what they're trying to intend to do, but isn't that going to be bottlenecked by... everything else? There's on-board RAM. The bus is going to be the bottle neck Quote Link to post Share on other sites
Phazmatis Posted February 5 Report Share Posted February 5 On 2/3/2021 at 7:53 AM, uyjulian said: There's on-board RAM. The bus is going to be the bottle neck This might be problematic for Macs, since the video circuitry in the BBU expects to find the framebuffer in the DRAM chips, not on the other side of the BBU, in the CPU socket. Maybe it'll need special pass-through RAM regions. Quote Link to post Share on other sites
Frobozz Posted February 11 Author Report Share Posted February 11 Huh. This is actually kind of a nutso project (in a good sense). One thing that's interesting, is that the CPU is configurable via software apparently, including the ability to control the speed, control whether the onboard 32 byte RAM is available to the host computer, etc. Take a look at the developer's blogs, especially the one about "Amiga-ness". https://www.buffee.ca/home/ Quote If your existing 68000 can do it, then Buffee can do it. Just some 2000 times faster. But I did say that Buffee is not “Amiga specific” and that we cannot support things like Autoconfig, didn’t I? Well, I meant that the memory and peripherals INTERNAL TO BUFFEE cannot be automatically enabled and used by AmigaOS. Or EmuTOS. Or Mac System. Because they all do this differently and they all expect memory and peripherals in different locations. What this means is that from a default state, Buffee will operate in “ultra compatible mode” and will require that the user or retailer preconfigure Buffee before hand. This includes such things as Enable CPU local RAM in 32-bit memory (disabled by default) Set the location and amount of this RAM Enable data and/or instruction caches for any memory block (by default only the instruction cache is enabled in 24-bit memory, all caches are enabled for 32-bit memory) Enable PJIT instruction cache for any memory block (by default, PJIT ICache is enabled only on 32-bit memory) Set the CPU base clock PLLs (presets for 275 to 1000 MHz) Set the CPU clock divider (from 1 to 1/256th of the base clock) Select between 68000 or 68030 instruction set (68000 default) Select between No FPU, 68882, 68040 or fast 68040 FPU modes (No FPU is default) Enable 68K MMU emulation Preload and remap up to a 2MB ROM image (with or without 68K MMU enabled) None of these settings need to be set by a CLI utility on each boot (though they can be); these can be saved into the EEPROM memory which will be retained while powered off I'm probably just projecting wishes here, but I'd be really happy with something I could put into a Mac Plus, tune it to say 50mhz, use the existing Gemini extensions/control panels, and not have spent $1500 on that 030 Mac Plus on eBay. Quote Link to post Share on other sites
rplacd Posted Monday at 12:41 AM Report Share Posted Monday at 12:41 AM (edited) Not to resurrect a thread that went into the weeds about Buffee, but: I would really love some way to connect an SE/30 PDS slot to an FPGA board for experimentation! 'twould be fun to hack with, even for reasons other than accelerator cards. Anyway, I know there isn't a '30, '40 etc soft core floating around, and I'm only a beginner teaching myself digital logic and FPGA design, but what the hell, what's the worst that can happen other than learning through mistakes /shrug Edited Monday at 12:48 AM by rplacd Quote Link to post Share on other sites
Trash80toHP_Mini Posted Monday at 07:01 AM Report Share Posted Monday at 07:01 AM Off the top of my head, the first thing required would be a prototyping board like we had back in the day. They were for wire wrap, some were bare for the PC and some had the expansion logic to slot interface circuitry ready to populate on the board. We've seen SE/30 protoboards crop up, but of the bare sort for wire wrap. IIRC 030 PDS requirement specs buffering as close to the slot connector on the card as possible. From there anything goes within specs outlined in Designing Cards and Drivers for the Macintosh Family 2e. Physical interface should be easy enough. I'd prefer it to be more accessible, user friendly and a lot more cost effective setup than stacked EuroDIN-120 monstrosities, but that's another bridge to cross. Quote Link to post Share on other sites
rplacd Posted Tuesday at 11:50 AM Report Share Posted Tuesday at 11:50 AM On 2/28/2021 at 11:01 PM, Trash80toHP_Mini said: Off the top of my head, the first thing required would be a prototyping board like we had back in the day. They were for wire wrap, some were bare for the PC and some had the expansion logic to slot interface circuitry ready to populate on the board. We've seen SE/30 protoboards crop up, but of the bare sort for wire wrap. IIRC 030 PDS requirement specs buffering as close to the slot connector on the card as possible. From there anything goes within specs outlined in Designing Cards and Drivers for the Macintosh Family 2e. Physical interface should be easy enough. I'd prefer it to be more accessible, user friendly and a lot more cost effective setup than stacked EuroDIN-120 monstrosities, but that's another bridge to cross. Did a sanity check reading that – 120 pins??? Holy hell, who has an FPGA development board with that many pins available for external use? Quote Link to post Share on other sites
trag Posted Tuesday at 11:25 PM Report Share Posted Tuesday at 11:25 PM (edited) On 3/2/2021 at 5:50 AM, rplacd said: Did a sanity check reading that – 120 pins??? Holy hell, who has an FPGA development board with that many pins available for external use? I've looked a couple of times. The answer is pretty much no one. Someone trying to plug an FPGA into a Macintosh PDS slot would really need to build a custom development board. There are plenty of I/O pins available on affordable FPGAs. They just don't get pinned out on development boards. Often, the existing development boards will come with schematics, so one could build an identical board that also brings additional I/O pins out to a 120 pin DIN connector. That way, things like memory and such are already handled by the existing design. Could be problematical though if the pin choices of the development board don't cooperate well with what you need for the Mac development. Edited Tuesday at 11:28 PM by trag Quote Link to post Share on other sites
Trash80toHP_Mini Posted 5 hours ago Report Share Posted 5 hours ago Interesting! So how big a deal would it be to give such a thing a go? Idle curiosity from my seat in the peanut gallery, but have you got links handy to some possibilities for such a project? Quote Link to post Share on other sites
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