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About jamesmilne

  • Birthday 04/05/1984

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    Old Macs! Techno/DnB/Electronica. Software development.

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    Software Engineer

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  1. I'm writing this from memory, maybe later on this week I'll try doing this again and see if I had to do anything else to get the A/UX image to mount on the SE/30.
  2. Hi solidbao, I did this, yes. I made a second SCSI target on the SCSI2SD card (you can configure this with the 'scsi2sd-util' configuration utility via USB) and copied the A/UX installation CD image onto that virtual SCSI drive. You can even flag the device as being a CDROM, but I don't think I bothered with that. Copying the image onto the logical unit is the trickiest part. When you configure the second SCSI target on the SCSI2SD, it should say what sector number the logical device starts at. Each block is 512 bytes in size I recall. You can then use 'dd' on your Ma
  3. Yes indeed, it has been quite helpful. It confirms that I need to implement the E_AttachPH protocol handler stuff, as that's what MacTCP, OpenTransport, etc use. I'll need a small amount of assembly glue to do that, but it seems straightforward. I've also been disassembling the Dayna DaynaPORT drivers, which helpfully were compiled with the debugging symbols left in, so I've got some annotations in the disassembly to look at.
  4. I’ve written a small DRVR, put it into an ‘enet’ resource whose ID matches my board ID, and copied it into my System file. Yay, the OS loads it! I’ve put a DebugStr in DRVROPEN and it pops up in Macsbug. So I can at least get the OS to load my driver. Next I’ll try putting it in an INIT file and see if its detected that way. (I’ll put all my code on GitHub once I’m done.)
  5. One source of hints I found here: https://www.fenestrated.net/mirrors/Apple Technotes (As of 2002)/nw/nw_13.html Also Inside Macintosh on networking & AppleTalk http://dec8.info/Apple/macos8pdfs/InsideMacintosh_PDF/Networking/Ethernet-TR-FDDI.pdf
  6. Hi guys My apologies for the long hiatus on my project to build a network card for the SE/30. Mark and I have been busy at work the last six months, and I have two small kids (3.5yo and 1yo), so haven’t had a load of time, but I took a look again at Christmas to see if I could make some progress. We were having some issues with random bus errors and crashed after writing to the card’s address space. Mark scratched his head a bit and figured out what was wrong with our CPLD logic. Its now rock solid. Once that was fixed, I managed to generate a Slot Resource
  7. The CPLD is a baby FPGA, but it might be enough to interface a SATA controller chip with the PDS slot if it has the right interface. The problem will be finding a SATA controller chip with an interface that isn’t PCI or PCIe, which are not simple to interface to via the PDS slot. Not sure there’s much point in building anything for Ultra SCSI since drives are rare & expensive. It would also be tricky due to the huge number of differential pairs involved. A PDS or NuBus to PCI bridge implemented on the FPGA might be feasible though. I’ve recently bought a
  8. Sorry, I guess that video was a bit cryptic. It is showing a hex dump of the first 128 bytes of each packet it receives over the network. It's receiving various broadcast packets from other machines. For the LAN9218 to work with SCSI, you'd need an FPGA to connect to the SCSI bus and handle all the SCSI protocol stuff, and implement some special SCSI command that could read/write registers. You could maybe do it with a microcontroller, like the RaSCSI project. A microcontroller isn't really ideal for directly interfacing with SCSI. It can take quite a few CPU cycles for
  9. Got it receiving packets now. Indeed the byte swapping on the board is the correct thing to do, as it avoids the need to swap bytes when reading/writing data from/to the FIFOs as 32-bit words. Video on my website: https://www.mactothefuture.org/update/2018/07/06/ten-four-big-daddy.html
  10. Yeah, endian issue. The chip is designed to work with little endian CPUs. If you want to use it with a big endian CPU, the data sheet says the hardware designer will need to accomodate this (swap the bytes). I’m thinking that our board is not actually wrong. I need to swap the bytes on the CPU when accessing the registers in the 9218 chip. However when I actually write data into the buffers, which has to be done 32bits at a time, I think the byte-swapping is actually required.
  11. Yeah that happened recently. I plan on recapping the analog board soon.
  12. Hi SE30_Neal, I bought 4x16MB SIMMs from OWC. When I tried them on their own, they didn't work, same symptoms as you. Corrupt screen at boot and sad mac sound. I tried them in the first 4 slots with a further 16MB (4x4MB SIMMs) in the remaining slots, but that didn't work either. What worked for me is 4 x 4MB in the first 4 slots, then 4 x 16MB in the remaining slots. I'm currently rocking 80MB of RAM, which is not too shabby. I believe this goes against what I had read about putting the larger SIMMs in the first slots, but who knows. I've had zero issues si
  13. Getting some progress now. Auto-negotiation and MDI-X (to automatically handle cross-over) is working. I've got link/speed lights showing up too. Green is Link. Orange is 100Mbit.
  14. Success! We reprogrammed the CPLD to ignore the FC lines, and now I can read/write registers on the card. I've also discovered that we did not in fact have to swap the byte order of the data bus in order to talk to the LAN9218. Now all my data is round the wrong way No matter, I can bodge around that in software until we make more boards. Now to fire up MPW and write some code to test reading/writing packets...
  15. I’ve been enjoying using MPW recently. I was always a Codewarrior guy back in the day and never used MPW, but I’m very much a vim/make guy these days, so MPW suites my sensibilities much better! On http://macintoshrepository.org/ there is quite a lot of old Apple Developer Connection CD ISOs that contain sample code and documentation. A wiki would be great, pointing to this kind of resource, sample code, and books.
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