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Everything posted by bbraun

  1. The 630 can take up to a 128mb SIMM in a 32x32 configuration, I believe. The second simm slot, on boards that have it, can only take up to 64mb (I think you need to use the 128mb SIMM, and only 64 of that is visible). There's several threads about it, and trag has described the SIMMs to use. It should be the same 128mb simms that work in the 605.
  2. It's probably fine to upgrade the soldered ram and not have to use the expansion card. But going above 4mb seems tough.
  3. Just because the Classic, LC, and IIsi were released together doesn't mean they share any architectural similarities. The IIsi uses the MDU memory controller found in the Iici. The Classic uses the BBU memory controller (well, calling it a memory controller is a stretch, it acks some bus accesses and moves physical ram around so the machine can boot out of ROM) found in the SE. The LC was the first with the new memory controller also used in the LCII. The physical locations of hardware are also their logical locations in machines without an MMU. Hardware lives at physical addresses, th
  4. The address map for the Classic puts ROM at the 4mb mark, so it's kinda stuck to 4mb. All the 68000 macs use this address arrangement, with the exception of the Portable. The Portable is the odd one here, where it maps ROM at the 9mb mark. In the 68000 machines you can't really rearrange addresses since there's no MMU. You can't remap the hardware registers, so things are kind of stuck.
  5. JFYI, with the 610 series, you can't interleave RAM SIMMs because of the way they arranged the banks. It has half the SIMM slots, and rather than just leaving off the top 2 SIMMs, they've split things up so every other bank will be empty, preventing any interleaving of the SIMM slots. 8mb soldered is still interleaved, but the SIMM slots are gimped. I never thought much of the 650 and 800 machines until I started messing with the memory controller. Now, they're pretty much my favorite 040's. Solder on a ROM SIMM slot, put a modified ROM on there to disable the RAM check and enable the
  6. The memory controller on the 605 supports interleaving, but the 4mb of onboard ram is not interleaved because it is just 4mb in a single bank. The RAM SIMM will nearly always span banks and therefore be interleaved. Interleaving can give up to 10-15% speed improvement depending on how it is being accessed. The onboard video will always come from the onboard RAM (if there is any), so it will always use the "slower" RAM. You can also see this on the Centris/Quadra 610 and 650's. If you get one with 4mb soldered, it'll be non-interleaved, and if you get one with 8mb soldered, that'll be i
  7. I don't have an LC, but I looked at the ROM disassembly a bit. There are definitely limitations in ROM, and from the ROM, it is likely the VISA memory decoder is limited to 10mb. The LC entry in the table the ROM has to tell it about the machine, says there are 2 banks of RAM: one up to 8mb, and one up to 2mb. The routine that figures out how much RAM is installed in each bank assumes always 2mb in the 2nd bank. The LCII uses the same memory controller, but has 4mb soldered on. I also do not have an LCII, but everymac says it is limited to 10mb, although you can install up to 12mb (2x4mb
  8. Isn't there solder points for a ROM SIMM socket underneath those DIP sockets? Desolder the DIPs and solder in a ROM SIMM socket, and use a dougg3 ROM SIMM!
  9. To program them, you pretty much need a miniprog3, which is about $90. It's only used once in the initial programming, since mmcmaster has the software update via usb working. He's made it so any jtag or swd programming device should work, but I haven't found any software other than the Cypress stuff that knows how to program these chips, and the device support for the Cypress stuff is limited. After fighting for a while to get my jlink2 device to program these things, I decided it was much more expedient to just get the miniprog3. Especially with being the first set of devices I assembled
  10. That seems about right to me. Using the SCSI to CF setups, formatting a 4GB CF card on an SE/30 takes long enough that I just kick it off and go do something else for a while. Easily a couple hours. Those low level formats + verify takes a while.
  11. Maybe time for a sanity check? Ok, I've got a lot to say about these statements, some of which was covered by Gorgonops, but mostly I can't reconcile it with the later statement: The initial argument is don't do software raid because of performance, then recommending USB 1.1? Trash's initial concerns about controller failure are extremely valid, and IMO, one of the best reasons to use software raid, and acknowledges the performance tradeoffs. I see nothing wrong with the initial premise, although if you've got a small enough data set to fit on a single disk (or can be ea
  12. Veering off topic here, but speaking of higher resolutions for older machines... The PCI ATI Radeon 7000 64MB can drive 1920x1200 over DVI. The PC version of the card can be had for cheap, but the EEPROM on the board is too small and needs to be swapped for a larger version. After that, it can be flashed for System 7 use. System 7 at 1920x1200 DVI is niiiice.
  13. Awesome, thanks, that's what I needed. Sorry about the confusion there, I even looked at the schematic while assembling it, and it says "22". I just figured "22k" and went on my merry way. I've got one fully working, the other one probably just needs some touchups. Thanks again!
  14. dougg3 had a similar thought. He found these chips have nonvolatile latches, but they don't seem relevant this particular problem, and from what I can tell, should be included in the hex files (which also encode the processor type and other metadata, not just the binary code).
  15. I just received the CY8C5267AXI-LP051 and assembled a second SCSI2SD. Unfortunately, it's exhibiting the same behavior as the first. PSoC Creator and Programmer can both see the mcu, and program it successfully, but no USB device. I can modify the code to toggle the LED, so I know it is getting loaded and running, just no USB for some reason.
  16. I was able to change the device type in both the USB_bootloader and the SCSI2SD projects, rebuild, and theoretically reprogram (PSoC Creator and PSoC Programmer both reported successful erase, program, verify). However, it doesn't show up as a USB device on my machines, and scsi2sd-config doesn't see it. Neither does the bootloaderhost program. I've verified continuity from the usb cable through the connector all the way to R4 & R5 for D+/D-, and verified the voltages at the decoupling capacitors of the PSoC (3x 4.83V and one 3.3V). Then verified continuity from R4 & R5 to the P
  17. JFYI, your parts.ods file lists the processor as CY8C5268AXI-LP047, and the PSoC creator file has the processor as CY8C5267AXI-LP051. Apparently it cares when it goes to program the device, it checks what is connected and then gets grumpy when they don't match.
  18. Yeah, I create dc4.2 images on real drives. Although for the most part, I use minivmac to create writeable .dsk images. With the import utility, you can just drag files in and save them on the images.
  19. Unless I'm missing something, the internal modem connector of the duos doesn't speak serial. It's basically soft-modem signaling and the different modem cards were for different countries with different telephone certifications. There's no rs485, and no tx/rx that I could find on the dev notes. We went over this once before, but if there's new information on that connector, I'm all for it.
  20. Thanks. OpenOCD and jflash don't list support for Cypress or the PSoC5, so I ended up ordering the miniprog3. It should arrive in a few days and hopefully I'll be able to tell if I assembled this correctly.
  21. Well, I assembled a board by hand (no baking, just soldering iron) and aside from possibly inhaling some of those super small capacitors, it looks fine, no observable shorts, and continuity tests seem fine. I'm trying to use a Segger jlink2 with a 20pin to 10pin adapter to program the USB_bootloader. I've got a jlink2 compatible gdbserver that sees the cypress processor and I can load the USB_Bootloader.elf, but doing so doesn't show up as a USB device on the computer, bootloaderhost and scsi2sd-config don't seem to recognize it. I'm not sure if 'load' from gdbserver is actually programming
  22. Mine arrived last week and it's been great. I've been using it on a Quadra 800 and a Mac II. I know nothing is ever fast enough, but I haven't had any complaints with the speed. I installed 7.1 in a couple minutes, no problems. This has been pretty neat, thanks a bunch mmcmaster! I got the PCBs I ordered and the parts to build one should be coming from digikey in the next couple days. Hopefully I'll be able to assemble one. The fine pitch of the processor is a bit intimidating, but I figure I'll give it shot.
  23. The output of those signals go straight to the DB9 connector on pre-ADB mice. One of the outputs from each axis is wire-OR'd to an interrupt line, so when there's movement, it interrupts the processor which then polls the state of all 4 lines and translates that into how many pixels the mouse should move and which direction. The pre-ADB mouse was super simple mechanically, but annoying to replicate logically in code.
  24. It's hard to tell, but some of the pins on the south side of the AVR look pretty close. But if it checks out with the continuity test, probably fine. Maybe double check the decoupling capacitors on the back of the AVR? FWIW, I'm at 3 working out of 5 attempted builds. The very first one I attempted, I screwed up the AVR. At least when the AVR isn't functional, you can stop early. Then in the last batch I ruined the CPLD on one, removed it, replaced it with a new one, and AFAICT, it's all good except one CPLD pin is grounded that shouldn't be, and I have no idea where. That one is 100
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