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    • Back with another update! It's a pretty exciting one that even includes some magic smoke! Curious? Read on...   Before soldering the shield back onto the logic board, I decided to clean up the I/O ports a little bit. Here's what they looked like before:     And here's after working on them with some 1000-grit sandpaper. Much better!     Extreme closeup! Whooooaaaahhh!     After slotting in the RF shield, I bent the tabs like they were before. It was pretty easy to solder the shield in since it was held in place.     Shield installed!     Next, it was time to recap the analog board. Normally, I post a link to my DigiKey cart with all of the caps, but unfortunately a couple of the caps are out of stuck, presumably due to supply chain issues. I'll post a link to the shopping cart here when the other parts are available.     First, I marked the old caps with a green Sharpie to keep track of what I'd replaced.     Then, one at a time, I desoldered caps. Sometimes I heat one leg and rock the cap, sometimes I used the soldering sucker, and sometimes desoldering braid.     New cap installed here! I always solder one leg, and apply gentle pressure from the back while reheating that leg, which seats the cap firmly against the board.     Here's a new cap, and an old cap that I couldn't get a replacement part for. I try to find the same diameter and leg spacing, but I don't worry about height. I also try to use Nichicon or Panasonic for electrolytic caps.     Analog board done!     At last, time to reassemble! Good thing too... my office has two torn-apart SE's, a torn-apart SE/30, and torn-apart external floppy drive! First, I hot glued the speaker back in.     Next, I reinstalled the chassis. Yikes, it is blue! But I decided that there was no need to spend money on grey or silver paint. I just wanted to stop the rust. I have plenty of Macs that I make "perfect". Most people would have just thrown this one out anyway, I've already put too much effort into it.     Jumping ahead a bit, I installed the analog board and logic board, but left the floppy drive and hard drive out to do a quick power-on test.     The ground lug on the CRT was a bit rusty, so I cleaned it up with some sandpaper to ensure a good connection here.     Time for the power-on test!     ERMAGERSH THER MERCERTERSH WERKS! One thing I hadn't tested before now was sound. No problem, it chimed as usual. The CRT is pretty far out of adjustment. I'll need to adjust rotation, width, height, and centering. Basically everything. I don't know if there's a good guide out there on exact picture size, or if there's a program I can run to help calibrate it. If someone has info on that, please let me know.     Next up, the floppy drive!
    • There’s are standoffs, I got it booted up finally, I had to adjust the voltage on the analog board to come up to 5v, it was low when the upgrade board was installed, once adjusted to close to 5v it finally powered on. It’s still finicky, I think the analog board needs some love. Not sure how to tell if the upgrade is working, what OS should I be able to boot into with 2mb? I can only get up to system 4  with my floppy emu, if I try to go to system 6.0.8 it freezes.      Tried a SCSI2SD on the SCSI port but it’s not getting any power, so not sure if the SCSI upgrades on these provide power at all through the pins...
    • Yeah those Killy clips are really prone to unreliable mating after many connect/remove cycles. Ensure they are fitting snugly and press down hard to ensure the board stay put. 
        Also ensure the upgrade board isn’t shorting out anything on the logic board. I don’t see any standoffs there?   By the way, nice upgrade! I’ve always wanted one of these. 
    • Not exactly.  If you use the dedicated DDR2 controller cells built into the FPGAs, you'd have two separate 16 bit buses.   You could stripe your 32 bit operations across the two controllers, using the FPGA logic, but you'd have to include that in your development.  You wouldn't just be sending 32 bit transactions to a single controller.    Of course, you'd probably develop that by creating a logical 32 bit controller that stripes 32 bit transactions across the two physical 16 bit controllers.  That might add a little latency, but at DDR2 speeds, it probably doesn't matter.   If you use the development tool that creates a custom DDR2 controller (and ignore the built-in controllers) then you could have a true 32 (or 64) bit wide  controller, which has the advantage of saving some IO pins (no duplication of address/control pins) but the disadvantage of using more of the FPGAs general logic.  There's so much logic available these days, that may not matter.     DDR2 memory chips are available in 512Mb, 1Gb, and 2Gb sizes, or were.  It's been a few years since I was a DDR2 driver monkey.   Every capacity chip is available in 4, 8 and 16 bit widths.   So, a 32 bit wide DDR2 controller could be populated with eight X4 chips, four X8 chips or two X16 chips.   In practice, the only reason to use anything other than the X16 chips is if you are trying to increase your total capacity.   So you'd use two X16 chips for a 32 bit wide bus, or four X16 chips for a 64 bit wide bus.      Xilinx typically takes a given FPGA chip/die and makes it available in several different packages.  The different packages have different numbers of pins/balls and so affect how many I/O pins/balls are available.   So, for example, a given series of Xilinx FPGA might come in versions with 25K, 50K, 100K and 200K configurable logic blocks (CLBs), perhaps with some number of DSP slices and DDR2 controllers on the chip.    Then every one of those versions might be available in 144, 208, 256, 484 and 586 pin packages.   The above numbers are made up, but in the neighborhood.   The larger pin numbers yield more available IO pins to be used.  So the ratio between on-chip logic and IO pins can vary greatly.   The Xilinx chips I looked at recently contain four DDR2 controllers, each 16 bits wide.   Which, on the face of it, would suit the above needs well.   However, two of the DDR2 controllers are not pinned out except in the largest (most expensive) packages (packages with the most pins/balls).   You might need those largest packages any way, in order to get enough I/O pins, but it's just something to note.  In effect, these chips only have two available DDR2 controllers, except in the largest two packages.   But regardless of all that, you could satisfy any of these needs with a single X16 DDR2 controller, by, as you noted, buffering the transactions up to the required width.   Additionally, DDR2 transactions are performed in a Burst, typically of four reads or writes.   The Burst is going to happen (take up time) no matter what.   If some portion of the data is not needed those portions of the burst are signalled to be ignored, but they still happen and still take up time.   So, if your controller is doing every 16 bit transaction in groups of 4 anyway, it's always going to be taking time to read or write 64 bits.   All that said, I think soldering the DDR2 memory chips down is definitely the way to go.  They're reliable and tiny, like 12.5mm X 10mm X less than 1mm high.
    • Nice work! Always good to hear that happy chime once a Mac is all cleaned up and functional.   I wouldn’t touch the motherboard caps at this stage - maybe give it another 5 years and check for cap leakage every now and then. 
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