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Serial Port Interrupts

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#1 Charlieman

  • 68000
  • LocationLeicester, UK

Posted 20 May 2013 - 07:08 PM

This is a Lazyweb request. Don't research it but answer if you know off the top of your head.

The Mac Plus allegedly assigns a higher processor interrupt to the Modem port. Is this true, and does it apply to the earlier models? Does it apply to later models?

My back of an envelope calculation suggests that this provides a negligible performance improvement. It might reduce the likelihood of dropping the line. Any thoughts?

#2 Gorgonops

  • Moderators

Posted 21 May 2013 - 03:23 PM

After reading a brief technical explanation and looking at a citation in the original "Inside Macintosh" I'd say the following:

The Mac Plus allegedly assigns a higher processor interrupt to the Modem port. Is this true, and does it apply to the earlier models?

The "higher interrupt priority" is mentioned in the pre-Plus-supplement "Inside Macintosh", so yes, it applies to earlier models.

Does it apply to later models?

This is where, to be at all definitive, I'd want to look at a schematic and read up on the 8530 SCC, but it appears that the "higher priority" business is actually a consequence of the internal architecture of the SCC chip. The chip only has one interrupt line and the same chip serves both channels. The "Modem" port is SCC channel A, "Printer" is SCC B, apparently there's some asymmetry in the implementation that gives communication on channel A a higher priority...

And yeah, the asymmetry is mentioned in the 8530's datasheet, section 2.4.3.

Each of the SCC’s two channels contain three sources of
interrupts, making a total of six interrupt sources. These
three sources of interrupts are: 1) Receiver, 2) Transmit-
ter, and 3) External/Status conditions. In addition, there
are several conditions that may cause these interrupts.
Figure 2-9 shows the different conditions for each interrupt
source and each is enabled under program control. Chan-
nel A has a higher priority than Channel B with Receive,
Transmit, and External/Status Interrupts prioritized, re-
spectively, within each channel as shown in Table 2-8...

So, yes, technically it's not a "higher processor interrupt", but a higher priority on the SCC. Which would imply that all later models that still use the original SCC (or an ASIC which exactly replicates it) would behave the same way.

#3 bbraun

  • 6502

Posted 21 May 2013 - 04:55 PM

What will likely matter more than hardware interrupt priority is how the software handles each port differently.
Normally, the SCC is configured to generate an interrupt per byte received. This would be an excessive amount of interrupts for localtalk at the speeds it operates at. So, the printer port is expected to be used for localtalk, and when it receives an interrupt indicating a localtalk packet, interrupts are disabled and it polls in the rest of the packet. This means interrupts can be disabled for an extended period of time, and could potentially miss data coming in from the modem port. So the localtalk driver also polls the modem port for data while polling the localtalk packet in, and buffers the modem data so it minimizes the chance of dropping data on the modem port while polling in the localtalk packet. The floppy driver also does this, since floppy accesses are performed with interrupts disabled.

#4 Charlieman

  • 68000
  • LocationLeicester, UK

Posted 23 May 2013 - 04:06 PM

Thanks both.

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