Time to play: GUESS THAT SIMM!

[trag]

[i guess I had always assumed it was because of the cache because the two typically coincide. I just learned something new.

Yeah, the coincidence was a marketing artifact. The 6100/60 was sold without a cache. When Apple speed bumped the NuBus PPC family, they also started including the cache with the 6100 as a standard item.

Additional useless but perhaps interesting facts. The cache and ROM of the x100 series can go in each other's slots. They use the same pinout and form. The cache and ROM are DIMMs not SIMMs, so the subject of this thread is mildly inaccurate.

The ROM for the x100 series uses the same form factor and pinout (mostly) as the ROM SIMM for the x500 and x600 and Beige G3 families and as the Apple Network Server. In the Beige G3 the Vcc pins were moved to pins unused in early versions and switched from 5V to 3.3V.

I designed a circuit board which can be used in any of them depending on what you program the Flash chips with and whether you install the 0 ohm resistors on the 5V pads or the 3.3V pads. I built a few Kansas ROM DIMMs for the x500 series (also works in the 7200) and some Rev. C Beige G3 ROMs.

 

[MrMacPlus]

The cache and ROM are DIMMs not SIMMs, so the subject of this thread is mildly inaccurate.

IIRC it's actually a SIMM I have, but I will double-check.

 

[Bunsen]

Hi trag, nice to see you back around these parts.

If you can be bothered sparing the brain for it, I'd love to hear your thoughts on

recreate the 1MB module, perhaps using something similar to a SIMMtree to mount 4 x 256k.

or replacing the cache RAM ICs on a 256k

 

[z180]

These L2 caches were available in different sizes and can be the same size as

the RAM in these Macs but only up to 1MB were produced.

pinout lists them as SIMM:

http://support.apple.com/kb/TA34395?viewlocale=en_US

Its a real speedup on a 6100 and can even buffer the onboard video that runs

on the slow system RAM.A lot of old computers have L2 cache installed but on a 6100/60 its the opposite.

 

[trag]

pinout lists them as SIMM:

http://support.apple.com/kb/TA34395?viewlocale=en_US

Yes, that's wrong. Note that the total number of pins is 160. There are only 80 pins on each side of the module, so it must be a DIMM with distinct connections on front and back.

Second, that's that the cache for the 7200 and x500 family, which is different from the cache for the x100 family, so it isn't the cache in question.

But really, Apple just had a brain fart there. They didn't make any 160 pin wide SIMM sockets. That puppy goes in an 80 pin wide DIMM socket.

 

[trag]

Hi trag, nice to see you back around these parts.
If you can be bothered sparing the brain for it, I'd love to hear your thoughts on

recreate the 1MB module, perhaps using something similar to a SIMMtree to mount 4 x 256k.

or replacing the cache RAM ICs on a 256k

You're going to need a custom circuit board. The sockets are so different that a SIMMtree would never fit without an equivalent amount of effort.

It's conceivable that you might be able to gang up 256KB modules, but I doubt it. A cache isn't a simple memory module. It has both fast SRAM for cache storage contents and faster SRAM for Tag RAM which is where it keeps track of which computer RAM addresses are stored in what sections of the cache. I doubt that the tag RAMs gang up elegantly without taking them off the four 256KB DIMMs and mounting them in a new arrangement.

The chips themselves probably cannot be replaced with larger capacity chips, because additional pins would be needed to address the larger capacity--unless there are NC pins on the chips of the 256K version and the circuit board happens to hook them up as needed, and the larger capacity chips needed for 1 MB happen to use those NC pins.

The best thing to do would be to start by tracing out the connections on a cache module to see what goes where. Also get the datasheets for all the SRAM chips on the module so you know the pinouts, as that's part of knowing what connects where. If you don't have a 1 MB cache to examine, the 256MB will reveal most of what you need to know and leave 2 addresss lines as a mystery, most likely. But they may not be address lines, they might be segment selections lines or some such. I don't know that much about cache implementations.

Here is the pinout for the universal firmware module to get you started: http://www.io.com/~trag/Apple_pinouts/Firmware_Module_Pinout.txt Some or many of the NC pins might be used on the cache module. I bet all the data pins and most of the address pins correspond.

 

[Bunsen]

Thanks trag - as always your insight is most appreciated

 

[MrMacPlus]

it says its a Cache SIMM. :-/