Power Mac 7500-9600 Bus Speed Overclocking

I was able to dig up a datasheet for MT58LC32K36D7 and it is in fact 5V-tolerant. That lends credence to the theory that 5V I/O compatibility is required.

My mind is back to thinking about caches. Playing ADD kid this week, I guess.

I saw in another thread that you're building caches. Have you produced a PCB, or are you adding chips to existing boards with blank positions?

I have a bunch of ISSI and Cypress chips that say Input pins (address/control) are 5V tolerant, but not I/O (data) pins. I guess one could put level shifters on the data pins, but then that eats some of the timing. Also have a bunch of Cypress that are 5V all over, but 10ns rating. Too slow? Okay?

Which leads me to the next topic, have you sorted out the speed ratings? I see chips on Fizzbinn's guide showing 7 - 9 ns ratings. But then, there's another module with 14ns chips on board, although the TAG looks like it's still 8ns. And then reading some of the datasheets, they'll say they're 7 ns, but they "operate" at 14ns, or some such, leading me to think they just rated it for its fastest operation, but in practice, some of them are slower than one would think.

Anyway, if you're able to use anything besides those Micron chips in your experiments, I might be interested in sending some chips your way, if you're interested in further testing.
 
Tsunami/Stormsurge units were left behind as their cache cannot be removed and often limited speeds above 55mhz.

Not really a "consumer" level solution, but there's a resistor on PM9500/9600 which can be removed to disable the motherboard cache. Or maybe installed. R35? R31? Something like that. On the Umax S900/J700 board, there's a blank jumper position which can be populated to enable/disable motherboard cache.
 
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