CPU never addresses VRAM?

[teemaw]

My board is once again presenting a simasimac pattern on boot. Poking around the board with a scope I can see activity on address lines and data lines, but I noticed that the CPU never addresses into VRAM (pin 8 of UJ6 never goes low) and I'm guessing that's why the /WE pin on the VRAMs never go low either.

Does anyone have any ideas on what I should look into from here?

 

[zigzagjoe]

If you have a third party ROM, remove it in favor of stock. Check that the ROM is well seated and all signals make it to the socket (not sure the particular history of your board). You can try booting the board out of the case while applying a small amount of forward pressure on the socket too.

 

[teemaw]

Thanks for the suggestion, I just gave this a shot but no dice. All data and address lines are good between the CPU and ROM. I should mention that this is a rebuild using Bolle's SE/30 design, and I'm using a ROM-inator II slotted in a ROM slot is sized for a standard SIMM. Tried with the stock ROM as well with the same symptoms :/

 

[Melkhior]

I noticed that the CPU never addresses into VRAM (pin 8 of UJ6 never goes low)

That's not the same thing - the CPU could be addressing the VRAM but UJ6 (the GLU, presumably?) not detecting it properly. You could have connectivity issues for the higher address lines between the CPU and the GLU, or you could have a faulty GLU.

If you have a logic analyzer, you could check the actual addresses outputed by the CPU to see if anything matches the VRAM (check the memory map for the SE/30).

 

[teemaw]

That's not the same thing - the CPU could be addressing the VRAM but UJ6 (the GLU, presumably?) not detecting it properly. You could have connectivity issues for the higher address lines between the CPU and the GLU, or you could have a faulty GLU.

If you have a logic analyzer, you could check the actual addresses outputed by the CPU to see if anything matches the VRAM (check the memory map for the SE/30).

Thanks for your comment, unfortunately although some of these lines (A25-31, which represent the 26th-32nd highest bits -- SE/30 VRAM begins at $FE00 0000) have activity, it doesn't look like they are all high at the same time (some never go high). UJ6 is just a simple 8 input NAND (74LS30) hooked up to A25-31 and a PU.

 

[zigzagjoe]

Ah, a reloaded board.... unfortunately, that complicates things. Do you hear any attempt at a chime/sad mac/anything?
One of the first things the ROM does is try to checksum itself as a precursor to bong, before even video inits.

 

[teemaw]

Ah, a reloaded board.... unfortunately, that complicates things. Do you hear any attempt at a chime/sad mac/anything?
One of the first things the ROM does is try to checksum itself as a precursor to bong, before even video inits.

Hmm great tip, I hadn’t hooked up the speaker yet. I get a boot chime then immediately a death chime loud and clear. I guess the problem must be after the ROM checksum succeeds?

 

[zigzagjoe]

Yeah, that points towards failing a critical test before the video init. Looking through the ROM source, this seems to be the following tests: RAM sizing, RAM basic test, Dynamic bus sizing, or unexpected 68k exceptions.

Going with the simplest cause first, do you have 4 known-good SIMMs installed in the first 4 slots?

 

[teemaw]

Just tried swapping in the set of four into the first four slots from my working SE board but getting the same symptoms unfortunately. Tried another set that I haven’t used in awhile as well. I think I’ll have to check this area more closely with my scope.

Where can I find the ROM source?

 

[zigzagjoe]

This is the one I look at. https://github.com/elliotnunn/sys7.1-doc-wip

It is a newer version so don't take it as gospel but it still gives a good idea of basic flow.

 

[teemaw]

For anyone following, looks like the problem here was a combination of bad joints on the UH7 PAL and the UK12 VIA. Now to figure out why my ADB devices aren't working...