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Never mind. CE# of the chips is tied to pin 115 on the DIMM. Grackle (MPC106) has two RCS signals, RCS0 and RCS1 and the former goes to pin 115 and the latter to pin 35, but pin 35 is not connected to anything on the DIMM except that blank resistor. Also, signal name is probably RCS1#, not...

Also found that CE_ of the Flash chips on the 820-0961 module are floating, not tied low, not connected to a DIMM pad. They're routed to an unpopulated resistor that would go to pin 35, which is not GND, but is something called RCST# on the schematic...

Anyone know what this signal does? It's connected to pin 35. It's shown on this schematic (page 6) https://www.macdat.net/files/pdf/apple/schematics/apple/powermac_g3_gossamer.pdf On actual ROM DIMMs, on most of them it's not connected to anything. On the 820-0961A module it goes to a...

Working on a programmable DIMM. I did a Read-only DIMM (program chips before soldering) 20 years ago. The bright software folks seem to have a need for a programmable DIMM in this format now, so I'm adapting the design. But there are details. For example, 820-0961 DIMM from the beginning...

There is nuance to the problem. Drivers that are loaded later, don't seem to trigger the issue. So USB/Firewire cards will usually survive the boot process. Also, if if the multifunction card is the *only* card behind the bridge, then it will still work. There is a bug in PowerSurge's...

Right. Yes. Bus speed on the PowerSurge architecture (TNT/Tsunami) is completely controlled by the physical oscillator located on the CPU card. There's no way (that I can see) for influence to work it's way across the motherboard/CPU card interface to affect any circuitry on the CPU card...

Requesting the TNT Bandit and Grand Central documents if you have them, please. Seems possible to put Bandits at positions 0 and 3 provided no Chaos is present. Interesting that 16 MB of ROM is possible, though finding compact high density 5V Flash is a pain. Bandit provides the...

By "clock speed register" do you mean the "CPU Speed" register? If so, and I have not read the entire Hammerhead document, but does the register actually do anything? It looks to me like it is a method for hardware to record a speed/state request at start up, and then must depend on software...

From teh Hammerhead document that joevt referenced: Not quite sure how this corresponds to the CLK ID pins but I'm sure the relationship is there somehow... And this is interesting:

Thankyou. I've been wanting that documentation for something like 20 years. Any idea how it found it's way into the wild, and are the other documents listed as "further reading" available? Now going down a rabbit hole.... Already seeing that Hammerhead does indeed have 5 Bus...

I expect so. I think the way it ends up working is that the host sends 5V level signals and the chips must tolerate that. The chips send back 3.3V level signals, but the "high" logic level is high enough to register as high to the 5V logic. Both. But I don't know. The NewerTech hardware...

Excellent work, @obsolete . I don't seem to be getting notifications for new posts, for some reason. I guess 3 years isn't that long to miss a thread... It would be interesting to build a custom cache.... Fast SRAM chips down to 2.5 ns are (or were) available... TAG RAM is always the...

This design is even easier to solder...

Put every other chip on the back of the board.

If you're working from an existing design, there should be pads apparent on the design for the capacitors. Typically, one capacitor per memory chip used, so most likely, eight capacitors. Electrically, the capacitors go between the power supply and the Ground connection, and as close...

Datasheets ("Data Manuals"), in case this is helpful. The 53CF96 is expensive, in my experience. $10 - $20 each. The 53C96, I have a reel or brick or something around here somewhere, from back when surplus electronics were basically given away on Ebay.

Thank you for that. It's been 30 years since I programmed a PLD. Does the .zip file contain what I'd need to use my TL866II+ to program a GAL16VD-15 with that logic? Sorry for being obtuse. Also, do you have the SCSI adapter? Would you like to read the GAL from a SCSI adapter?

Mouse that came with my Outbound Model 125. From the discussion here should I conclude that not all Bus Mice will work?

Hmmm. Has @cheesestraws ever been in touch with you? He was trying to get a docking card working a few years ago and needed the pinout for the docking cable. https://68kmla.org/bb/threads/outbound-laptop-internal-docking-cable.38809/

Everything I post is IIRC, because it was 2 decades ago, so sorry for repeating IIRC, over and over again. IIRC, there's a floppy corruption issue if you leave the floppy inserted when you shut down. I think htere were some details, but I can't remember them. I probably have a written note...