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Decided to play with this a bit last night. Very simple issue, the UnlockFlash(9090) command simply tells the ICs to expose their manufacturer ID and device ID at address 0000 and 0001. I was getting really stuck on the ROM having BBBB at these addresses. So basically just need to recompile...

Very well done!! I can only marvel at this reverse engineering :)

To help keep myself organized, I put together a template to use for several iterations of testing different ROMs and SIMMs on my Q650. Attached are my notes, and admittedly my handwriting is AWFUL! But, I think this testing confirmed to me at least that the memory is being sized correctly...

@schrockwell if you get to the point of selling any completed board builds, I think you'll have some buyers! I'd like to get in line :)

Yes same with mine. Initial guess is it has to do with the amount of space in the ROM for the updated chime. A while ago I tried replacing the sound bytes, but ran into some issues. I'll need to revisit that again soon.

Here is probably a better way to visualize what I am trying to say. I'll do some more testing tonight. If this is how it works, then technically I suppose a single installed double-sided SIMM would never be interleaved (ie, banks 2 and 4 populated). So this would be a good way to test this theory.

@cy384 I'm still digging into this. I wanted to bounce this off of you, so I quoted your above post here. This is from when you booted with 3x 128MB SIMMs. I am wondering if the banks are setup like this in the Q650? So take just one 128MB SIMM.... I see from the wombat tool that it shows the...

Throw in a ROM SIMM slot, then that will open up new avenues of fun and expansion :)

OK very interesting! No I hadn't seen this thread yet. What you are saying in this thread surely makes sense to me, and I may give this a go (ie, hardcoding the values). I did re-write large chunks of the resizing code in assembly but that hasn't cracked the nut yet.

Yes I may take you up on this. I'll certainly pay for the card too. I did go so far as zeroing out banks 0/1 in the SIZEMEMORYPATCH routine in the ROM. But basically same behavior. Although one time I did get the system to boot just fine with 3x 128MB SIMMs. So banks 2/3 4/5 6/7 were each the...

Unfortunately not. I was thinking about getting one however. With the OneBufferedBit set, I can tell the Q650 boots all the way into the OS as the normal soft shutdown does the alert, then enter powers it down. I have some new SIMMs on the way: each chip 16Mx4 (=8MB), 8 chips per bank (=64MB)...

I'm pretty close to getting 512MB to register in the Q650, at least I hope. I do think it may have to do with the power/voltage drain by the big SIMMs. When I poke the 50F0E000 register and set the OneBufferedBus bit, the Q650 posts and does a full boot with 4x 128MB SIMMs. But by setting this...

This is fantastic! I've been looking for a MacClip Jr for a long time. I am going to follow your instructions and see if I can build one to clip on :)

Sorry, been out of pocket for a while working on some other hobbies. Returning to my newly arrived Q650, I can get it to register 328MB of RAM so far (8 onboard + 128 SIMM + 128 SIMM + 32 SIMM + 32 SIMM). I am running into the same issue BBRAUN documented back in 2012, where 3x or 4x 128MB...

Yes I pushed the ROM speed to the lowest (fastest), with the CayMac universal SIMM, and no issues. I ran another quick benchmark comparison, this time between 40MHz/60ns RAM/120ns ROM and 40MHz/60ns RAM/55ns ROM, and the faster ROM does make a small but noticeable difference for just about...

Oh that's a good idea to try that now with the onboard RAM disabled. I was just using romSpeed=100 (4) per the MEMCjr manual, which looks to be 120ns. I bet I could push this number down now with less latency on the RAM. I'll give this a go too :)

Great idea to compare like-for-like with the only difference being latency (80ns vs 60ns). The reduced latency of 60ns does show improvement over 80ns (see below). Both benchmarks were done with all the same registers and the same frequency of 40MHz (except of course the 1 bit change for the...

OK I ran an initial benchmark with extensions disabled on my LC475/Q605 with v092 of the ROM. Remember this version has the onboard chips disabled. I borrowed that hack from @Mustermann, and I also borrowed his LC475SetCPUClock program. But I made one change to the Config register bits for...

This is just such a great thread, I wanted to link it to this other one regarding ROM modifications. I borrowed from @Mustermann the hack to skip the onboard RAM and the LC475SetCPUClock program. However I made one mod to this program, and that was to set bit 3 from 1 to 0 for the Config...

Here is the "proof" that the v092 ROM for the Q605/LC475 (above) bypasses counting RAM bank 0 (slow onboard chips). Over the next couple days I am going to work on the Config register to see if I can get the MEMCjr to address the RAM at 60ns with the onboard chips disabled. (If you read the...