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That is not how DRAM generally works. In fact, I think 80ns was the most common DRAM when the Mac Classic was new.
And yes it is possible that the 1Mbit DRAM chips on the daughterboard itself may be bad.
The reason why it is 200ns BTW was that Apple was one of the early adopters of 256k DRAM back when the chips was expensive. By the time the 256k DRAM chips became more common, it was already mostly replaced by 150ns.
More precisely, it was the early Micron DRAM chips that had problems. Of course, eventually they improved the quality of the chips around the time many other US DRAM manufacturers was forced to shut down after DRAM prices fell in 1985.
Yes, the chips on 16MB 30-pin SIMMs are supposed to be 16Mx1. To use 4Mx4 chips would require extra logic. These SIMMs was never very popular for several reasons (including early 16Mbit chips being expensive and 400mil). I wonder which kinds of addressing the 512KB/2MB/8MB SIMMs with PALs uses.
They were using MODE32 1.2 which is not supported with System 7.5 and is probably not particularly good even with System 7.1. I think MODE32 7.5 is overall probably the best solution nowadays.
You can check how much RAM the ROM code thinks it have by using "About the Macintosh" without MODE32 loaded. The info should show that most of the extra RAM beyond 8MB is allocated to the system if the ROM code thinks it has more.
(Technical details: the applicable lowmem globals are MemTop and...
(The original Apple technote is pretty misleading on this topic)
(This also applies to the Macintosh IIx, Macintosh IIcx, and Macintosh SE/30)
The original Macintosh II did not have a PMMU by default. It relied on the memory controller hardware to map the installed memory into a contiguous...
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