Novy Systems accelerator for SE from 1987 at 50MHz?

[Trash80toHP_Mini]

The logicboard has to access RAM as well because video data is stored there. It can’t access RAM on the accelerator so you need to have RAM on the logicboard. 

HRMMM? RAM on the Accelerator would be loaded with the video data by the 68020, no? Does the logic board really care whether the frame buffer data it accesses from the same mapped location is physically located on logic board or PDS? I don't recall there being any portion of SE memory buffered expressly for the purpose of video like there is on the IIsi.

Just referenced the SE block diagram and it looks like BBU (Custom Gate Array) is fed data from either RAM Data Bus Buffers or SIMMs and RAM Address MUXs before sending the frame buffer data off to the A/B? But there is some hinkiness to be found in the address lines split between RAM Address MUXs and BBU on the CPU/PDS side?

 

[Gorgonops]

Just referenced the SE block diagram and it looks like BBU (Custom Gate Array) is fed data from either RAM Data Bus Buffers or SIMMs and RAM Address MUXs before sending the frame buffer data off to the A/B? But there is some hinkiness to be found in the address lines split between RAM Address MUXs and BBU on the CPU/PDS side?

It looks pretty clear from that diagram that the display address generation is fed from the BBU directly onto the RAM's RAS/CAS lines, not onto the CPU bus. If that is the case then, yes, you will need RAM in the motherboard for video to work.

 

[Paralel]

...I keep making mistakes because of edge cases, so now I hedge my bets...

Same here. Edge cases will get you every time.

 

[Trash80toHP_Mini]

It looks pretty clear from that diagram that the display address generation is fed from the BBU directly onto the RAM's RAS/CAS lines, not onto the CPU bus. If that is the case then, yes, you will need RAM in the motherboard for video to work.

That may be why a set of low profile, 256K KeyChain SIMMs will just barely fit under that overhang. I wonder what's required and where on the map? Might the Accelerator be using all of the SIMM capacity on board, but for memory locations dedicated to use as frame buffer on the logic board SIMMs? Makes no sense from the standpoint of some Accelerators woeking with SIMMs located on the Accelerator OR on the logic board though? But that could be the 68030 vs. 68020 implementation thing.

I've finally got Inside Macintosh in da house!  [] Too bad it's only Volume IV covering 512ke and Plus. Volume V for SE and Macintosh II should be at the rental office, but can't get there until Monday. :/