According to a quick check in the schematics:
* J20 connects the CPU's /CDIS pin to ground, that pin is otherwise pulled high.
* J103 connects /CIOUT (wherever that comes from) to pin 64 of the memory controller, that pin is otherwise pulled to ground.
* J106 connects pin 11 of UK6 to ground, that pin is otherwise pulled high.
Rev A motherboards seem to have J103 closed and the others open, and mine did too. The rev B motherboard shown above doesn't have the jumper headers at all, but that W1 butterfly pad thing that connects to where J103 used to be, presumably that makes it closed by default and you can open it by cutting through the butterfly pad.
Checking the 68030 datasheet, I get the following info:
* /CDIS disables the CPU cache.
* /CIOUT is the 'cache inhibit output', which "reflects the state of the CI bit in the address translation cacheentry for the referenced logical address, indicating that an external cache should ignore thebus transfer.". The signal goes from the CPU to UP8, and presumably from there to the rest of the system.
* J106 might be affecting address selection logic? Not sure there.
Either way, it seems these jumpers would be used to configure the system for an external cache card or something in that vein. No idea if they ever made cache cards for the IIfx.