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Cloning a 33MHz 68030 Upgrade for Mac II

Qrani

Active member
Always thought it would be an interesting idea... I've had this Macintosh II for a while and from what I can find online there were many manufacturers that made cards with a 33MHz 68030 that would go directly into the 68020 socket, like the Dove MaraThon 030, the MicroMac Marathon, the Sonnet Allegro Mac II, and probably others. I always wanted one of them, especially since ones like the MicroMac Marathon boast performance improvements of 170% to 200%. I realized that they're very simple cards, and it seems like it would be more fun and probably cheaper to make my own, given I've never seen a single one online. Of course the problem is that I don't have one to actually clone, nor the schematics for one, just low quality images online, so for now I am unable to.
 

Phipli

Well-known member
Always thought it would be an interesting idea... I've had this Macintosh II for a while and from what I can find online there were many manufacturers that made cards with a 33MHz 68030 that would go directly into the 68020 socket, like the Dove MaraThon 030, the MicroMac Marathon, the Sonnet Allegro Mac II, and probably others. I always wanted one of them, especially since ones like the MicroMac Marathon boast performance improvements of 170% to 200%. I realized that they're very simple cards, and it seems like it would be more fun and probably cheaper to make my own, given I've never seen a single one online. Of course the problem is that I don't have one to actually clone, nor the schematics for one, just low quality images online, so for now I am unable to.
The issue is they tend to have custom logic chips of some type on them. It isn’t just a case of copying the PCB sadly.
 

Qrani

Active member
The issue is they tend to have custom logic chips of some type on them. It isn’t just a case of copying the PCB sadly.
Well of course they have other logic chips on them. That hasn't stopped people from making, for example, 68040 upgrade cards before.
 

olePigeon

Well-known member
I'd recommend cloning the various Daystar adapters for the II, IIx, LC, etc. They're easier (and cheaper) to come by than any accelerator. And thanks to the hard work of various members on here, we have clones of the Daystar compatible 030 and 040 accelerators already (even if there is a parts shortage.)
 

Phipli

Well-known member
Second that, they're mostly wiring and a couple of caps, instead of carefully timed, logic circuits baked into obsolete, locked, chips.
 

Bolle

Well-known member
I'd recommend cloning the various Daystar adapters for the II, IIx, LC, etc
The adapters for the Mac II actually are a bit more complicated... there's a tiny ROM on them that contains patches that seem to be needed to run 030 CPUs with the early non-FDHD ROMs.
I couldn't figure out yet how the address decoding PAL on the adapter works to determine the logicboard ROM type. My guess is that they're looking for a set of accesses to addresses in a specific order that will happen on the early ROMs but don't happen on the FDHD ROMs.
If left out the adapter will run just fine with the FDHD ROMs and a PowerCache.
The LC adapter also has a ROM and a lot more logic on it but so far I didn't look into it any further.
IIx and IIcx adapters are indeed trivial.
 

Phipli

Well-known member
The adapters for the Mac II actually are a bit more complicated... there's a tiny ROM on them that contains patches that seem to be needed to run 030 CPUs with the early non-FDHD ROMs.
I couldn't figure out yet how the address decoding PAL on the adapter works to determine the logicboard ROM type. My guess is that they're looking for a set of accesses to addresses in a specific order that will happen on the early ROMs but don't happen on the FDHD ROMs.
If left out the adapter will run just fine with the FDHD ROMs and a PowerCache.
The LC adapter also has a ROM and a lot more logic on it but so far I didn't look into it any further.
IIx and IIcx adapters are indeed trivial.
Would it be easier to just make new FDHD ROMs and use a simplified II adapter?
 

Bolle

Well-known member
Would it be easier to just make new FDHD ROMs and use a simplified II adapter?
Totally. But the itch to figure things like that out is holding me back to go the simplified route just yet :p
The DiiMO Mac II adapter actually is similar and also contains a small patchrom. Maybe someone can make sense of what they might be doing...
 

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Trash80toHP_Mini

NIGHT STALKER
AHA! So that explains how the passive, Macintosh II DayStar adapter I sent you (generously donated to the cause by a member) differs from the active DiiMO adapter?

Wondering here if a simplified accelerator w/o cache that plugs directly into the the CPU/MMU sockets might be of interest? Provision could be made for piggybacking a cache daughtercard at a later date? Such would negate the necessity for IIci PowerCache conversion with its honking big, angled EuroDIN connector. Parallel would be the Socketed SE/30 PowerCache. Provision might also be made for a future SuperDrive upgrade for the bog simple, flat board design?

My first rev II will remain 800k stock, but acceleration is another thing entirely! :)
 
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cheesestraws

Well-known member
The DiiMO Mac II adapter actually is similar and also contains a small patchrom. Maybe someone can make sense of what they might be doing...

I know we had a chat about this but I'm going to dump what I think is going on here so I don't forget it. Bear in mind please that I do not know the Mac II ROM well, and I do not have the time, energy or inclination to disassemble it. However. Let's have a look. Looking at the hex dump, one thing stands out as a flag word: $55AAAA55, in the same location in both ROMs:

Screenshot 2023-04-01 at 15.55.06.png

$55AAAA55 is a flag value for a diagnostic ROM (thanks @demik for reminding me where I'd seen it before!). At least on the Mac Plus ROM, this is checked for at a fixed location very early in the boot sequence (see address $4A here): http://www.toughdev.com/public/plus-rom-listing.asm.txt. If the flag value is found, the following 32 bits are used as an address to JMP to.

The address in this case, on the DiiMo one, is $50F80088. Let's assume that the base of this ROM is at $50F80000, and see whether we get anything sensible disassembling from offset $88 within the ROM. Spoiler: we do (I've added some comments).

Screenshot 2023-03-29 at 19.59.41.png

I'm not really au fait enough with Motorola MMUs to know exactly what's being done here, but it's fairly obviously setting it up. Let's have a look at the Daystar one. The address after the flag word points at offset $AA, where we find the following similar things happening:

Screenshot 2023-04-01 at 16.15.59.png


So what these ROMs mostly seem to be doing is using a diagnostic ROM hook to hook into the boot sequence to set up the MMU nice and early. Presumably, the 800k ROM didn't do this, and so broke, where the FDHD ROM did. (Note that the Daystar ROM is a bit less brute-force than the DiiMo and actually checks whether the OS thinks it has set up the MMU by examining the MMUType low memory global).

This isn't the whole story, though. Both of these also have an obvious flag word at the very start, $AAAA5555. The fact that this is obviously of a piece with the $55AAAA55 flag word, and the fact that it's also in the same place in each ROM, looks suspicious. Looking at the Daystar ROM for a moment, we'll assume that, as with the $55AAAA55 entry point, the following 32 bits are an address. Let's ignore the fact that the first three bytes of the address are different—who has time for that kind of pedantry—and note that offset $2E is the first character after the terminating null of the Daystar copyright string. What's there? Well, it's code, and it makes logical sense:

Screenshot 2023-04-01 at 16.33.43.png

Putting $808 in cacr seems to correspond to clearing both the data and instruction caches, if I'm reading the manual right. So, while I don't know when this code is being called, it's clearing the processor caches and resetting the MMU's translation control register to a known state. The DiiMo has exactly the same code here, doing the same thing - the only difference being that the offset of the data to be pointed to by the TC register is different.

Why the first three bytes of the address are different in the first hook and the second hook, I don't know, but it obviously isn't totally arbitrary—both the DiiMo and the Daystar have the same discrepancy. I get a vague whiff of 24-bit vs. 32-bit addressing in that the MMU setup hook is somewhere nice and high in 24-bit mode, whereas the cache control one is not - but honestly here someone more familiar with the Mac II needs to weigh in.
 
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Qrani

Active member
Now whether it would work in a Mac II, and how you'd get it to be 33MHz is another question.
 

Phipli

Well-known member
@bredfrown

Read the post before last, it is exactly what you were talking about. As mentioned, there isn't much room in an SE chassis for stacking multiple cards so I don't think it would fit, unless you removed the existing socket and made a low profile board using a QFP chip with a custom carrier...
 
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