It’s not uncommon that voltage regulators on Nubus or PDS cards are fed by the 12V line.
DACs with external voltage references, high frequency clock generators that need their own 5V supply decoupled from the main 5V rail, ethernet cards with BNC usually also need 12V for the voltage regulator...
No extra hardware needed to accomplish this… the serial output stream of video data runs through one of the PALs, so you can just invert the output polarity in the fusemap and burn a replacement.
That looks really good. Did they just cut out part of the PCB around the chip? 😅
Mine at least came on an interposer that could be reused at some point.
As mentioned in the other thread somewhere, the swap is going to work with standard 520/540 CPU cards.
The 550 ROMs are not needed for the...
That's right, UI6 is just acting as a driver for the clock signal though and it needs the 16MHz input signal on pin 2 to generate it. And that input is fed by C16G which originates from the GLUE.
And finally took some time to do some boring work and cleaned up the schematics.
Those will probably help anyone troubleshooting a real or reloaded board.
Could you implement the same changes in the AttinyRTCmodule code as well so I can try if that helps with the problems I've got with it in the IIfx
because:
...sounds a lot like what the IIfx is doing as well. Even if I take a module over from the SE/30 and plug it into the IIfx all settings...
Curious if it's going to be a real one or not.
I can tell swapping a full 040 onto a CPU board from a 520/540 does indeed work just fine, the 550 ROMs are not needed for the FPU to do its thing.
Thread is about ROM dumps, but I guess this fits in as well while we're at it... put my hands on one of my Thunder DSP boards, desoldered the GALs and extracted some fusemaps to add to the archive.
Yeah, already know that you can right click the cells from Kens implementation for the XC2064.
The data bus lines are all just bidirectionally going from one I/O to another with a logic cell controlling the output enable for each direction individually:
Everything that's connected is relevant...
Wow, that was quick indeed. Just right when I figured out how to convert my files. Just dragging them on is much easier though :)
The layout it produces seems indeed to be pretty accurate. From what I can tell by comparing the schematics for the accelerator I'm working on at the moment with the...
I've got a few XC2018 bitstreams right here that I wanted to throw at it, but what exactly does it expect from the RBT file?
Is that just the hex dump that my programmer spits out when reading a config ROM converted to binary one for one?
Just as others have already said, monitoring this with great interest. Not so much because of the video card but that's some valuable work on the FPGA bitstreams right there.
This looks really promising.
Oh damnit, forgot to answer your PM you sent a few days ago. That's what you get for reading PMs on your phone... as soon as it's not shown as "unread" anymore it's basically gone.
The unpatched control panels don't work at all in the SE/30 as you can see. There has been a new patched one that...
I've been working on recreating the IIfx logicboard on and off for quite a while.
Checking the date of creation of the schematics file it reaches back to September '21. I started by working my way through the BOMARC schematics and transcribing them into Eagle. Everyone who ever just looked at...
Digging up this old thread... I just finished writing equations to match the original PAL at UK7.
It was quite tricky to figure out and took a while until I catched all possibilities.
Here's the signals that are connected to the inputs and outputs:
/DS - data strobe connected to CPU...
Nope, they fixed the memory issue externally in a PAL on the IIcx and SE/30.
I do have one of my Mac II boards modified in a similar fashion and it runs just fine with high >1MB RAM SIMMs.
II, IIx, IIcx and SE/30 GLUEs are identical. The video part of the SE/30 is done entirely in the 4 PALs that act like a PDS card to the rest of the system.