Bolle
Well-known member
In case someone wants to build themselves a 32MHz 68030 accelerator including 32K cache and optional FPU.
This design is the same used by Micromac (ThunderCache), Extreme Systems (Impact), Total Systems (Enterprise) and probably some more (Formac had comparable accelerators as well I think)
We are talking about this one:
View attachment 11529
Schematics:
GAL equations:
For the SRAM you want 8k x 8 static RAM. The two TAGRAMs need to be 8k x 8 as well like IDT 71B74 or ATT7C174.
The other parts should be self explanatory.
I did not yet build any actual clones due to the lack of machines to put them into, however the GAL formulas are tested and do work.
If someone is up to the task of funneling the functions inside those 6 GALs into one modern-ish PLD let me know (like how would I start with an approach at this?)
I might have some more projects like this in the drawer that could need this sort of work.
This design is the same used by Micromac (ThunderCache), Extreme Systems (Impact), Total Systems (Enterprise) and probably some more (Formac had comparable accelerators as well I think)
We are talking about this one:
View attachment 11529
Schematics:
GAL equations:
Code:
;$GALMODE MEDIUM
chip U1 GAL16V8A
i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /nc11=11
o12=12 f13=13 f14=14 f15=15 o16=16 f17=17 f18=18 o19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/o19 = /f18
+ /f17
o19.oe = f15
/f18 = /i1 * i3 * i4 * i5 * /i6 * /i7 * f14 * i8 * /f13 * /i9
+ i2 * /i1 * i3 * i4 * i5 * /i6 * /i7 * f14 * i8 * /f13
f18.oe = vcc
/f17 = /i1 * i3 * i4 * i5 * /i6 * /i7 * f14 * /i8 * /f13 * /i9
+ i2 * /i1 * i3 * i4 * i5 * /i6 * /i7 * f14 * /i8 * /f13
f17.oe = vcc
o16 = vcc
o16.oe = gnd
f15 = i3 * i4 * i5 * /i6 * /i7 * /f14 * /i9
+ i2 * i3 * i4 * i5 * /i6 * /i7 * /f14
+ i3 * i4 * i5 * /i6 * /i7 * /f13 * /i9
+ i2 * i3 * i4 * i5 * /i6 * /i7 * /f13
f15.oe = vcc
/f14 = gnd
f14.oe = gnd
/f13 = gnd
f13.oe = gnd
/o12 = i3 * i4 * i5
+ f14 * f13
+ i2 * i9
o12.oe = vcc
Code:
;$GALMODE REGISTERED
chip U4 GAL16V8A
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /OE=11 rf12=12
o13=13 rf14=14 ro15=15 o16=16 f17=17 f18=18 o19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/o19 = /i2 * /f17
+ i2 * f17
o19.oe = vcc
/f18 = i2
f18.oe = vcc
/f17 = f18
f17.oe = vcc
o16 = /i2 * /f17
+ i2 * f17
o16.oe = vcc
/ro15 := i3 * i4
+ /i5
ro15.oe = OE
/rf14 := /i2 * /i6 * /i7 * i8 * rf12
+ /i6 * /rf14
rf14.oe = OE
/o13 = /i6 * /rf14
o13.oe = /i9
/rf12 := i6
rf12.oe = OE
Code:
;$GALMODE REGISTERED
chip U11 GAL16V8A
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i8=8 i9=9 GND=10 /OE=11 f12=12
f13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/rf19 := /i2 * rf19 * i3 * i4 * /i5 * i6 * /f12
+ /i2 * rf19 * i3 * i4 * /i5 * i6 * /i9
+ /i2 * rf19 * i3 * i4 * /i5 * i6 * /i8
+ /rf19 * rf14
rf19.oe = OE
/rf18 := /i2 * rf19 * i3 * rf18 * i4 * /i5 * i6 * rf15 * i8 * i9 * f12
rf18.oe = OE
/rf17 := /rf17 * rf14
+ /rf19 * rf17
+ rf17 * /rf15
rf17.oe = OE
/rf16 := /i2 * i3 * i4 * /i5 * rf16
+ rf18 * /rf16 * rf14
rf16.oe = OE
/rf15 := /i2 * i3 * i4 * /i5 * i6 * rf15 * /i8
+ /i2 * i3 * i4 * /i5 * /i6 * rf15 * i8
+ /rf15 * rf14
rf15.oe = OE
/rf14 := /i2 * rf14 * /f13
rf14.oe = OE
/f13 = gnd
f13.oe = gnd
/f12 = gnd
f12.oe = gnd
Code:
;$GALMODE REGISTERED
chip U12 GAL16V8A
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /OE=11 f12=12
f13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/rf19 := /i2 * rf19 * /i3 * /i7 * /f13
+ /i2 * rf19 * /i6 * /f13
+ rf19 * /i6 * /f12
rf19.oe = OE
/rf18 := /i2 * rf18 * /i5 * /i7 * /f13
+ /i2 * rf18 * i4 * /i7 * /f13
+ /i2 * i3 * rf18 * /i7 * /f13
+ rf18 * /i6 * /f12
+ /i2 * rf18 * /i6 * /f13
rf18.oe = OE
/rf17 := /i3 * /i4 * rf17 * /i5 * i6 * /i7 * /f13
+ /i2 * i4 * rf17 * i5 * i6 * /i7 * /f13
+ /i2 * i3 * rf17 * /i5 * i6 * /i7 * /f13
+ i2 * /i3 * rf17 * /i7 * /f13
+ rf17 * /i6 * /f12
+ i2 * rf17 * /i6 * /f13
rf17.oe = OE
/rf16 := i3 * i4 * i5 * rf16 * i6 * /i7 * /f13
+ /i4 * /i5 * rf16 * i6 * /i7 * /f13
+ i2 * i4 * rf16 * /i7 * /f13
+ i2 * i3 * rf16 * /i7 * /f13
+ rf16 * /i6 * /f12
+ i2 * rf16 * /i6 * /f13
rf16.oe = OE
rf15 := /i2 * /i3 * /i5 * /i7
+ /i2 * /i3 * i4 * /i7
+ /i6 * i7 * i8
+ i6 * /i7 * i8
+ /i6 * /f12
+ /i6 * rf15
+ rf15 * /i7
+ /i2 * /i6
rf15.oe = OE
rf14 := /i2 * /i4 * /i5 * i6 * /i7
+ i2 * /i3 * /i5 * /i7
+ /i6 * i7 * i9
+ i6 * /i7 * i9
+ /i6 * /f12
+ /i6 * rf14
+ i2 * /i6
+ /i7 * rf14
rf14.oe = OE
/f13 = gnd
f13.oe = gnd
/f12 = gnd
f12.oe = gnd
Code:
;$GALMODE REGISTERED
chip U14 GAL16V8A
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /OE=11 f12=12
f13=13 o14=14 o15=15 o16=16 rf17=17 rf18=18 rf19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/rf19 := i2 * /rf19 * i3
+ rf19 * i5
rf19.oe = OE
/rf18 := i2 * i3 * /rf18
+ rf18 * i5
+ /rf19 * /rf18
rf18.oe = OE
/rf17 := /rf17 * f13 * /i9
+ /i4 * rf17 * /i5 * /i6 * /i9
+ /rf17 * i6 * f13
+ /rf17 * i5 * f13
+ i4 * /rf17 * f13
rf17.oe = OE
/o16 = /i2 * /i4 * i9 * f12
o16.oe = vcc
o15 = i7
o15.oe = rf18
o14 = i8
o14.oe = rf18
/f13 = gnd
f13.oe = gnd
/f12 = gnd
f12.oe = gnd
Code:
;$GALMODE REGISTERED
chip U17 GAL16V8A
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /OE=11 rf12=12
rf13=13 rf14=14 o15=15 o16=16 f17=17 o18=18 rf19=19 VCC=20
@ues 0000000000000000
@ptd unused
equations
/rf19 := /i2 * rf19 * /i7 * i8
+ /rf19 * /f17
+ /rf19 * /rf12
rf19.oe = OE
/o18 = /rf19 * /f17 * rf12
o18.oe = /i3
f17 = gnd
f17.oe = rf19
o16 = /i4 * i5
o16.oe = /i3
o15 = /i4 * i6
o15.oe = /i3
/rf14 := /i3 * /i7 * i9
+ /rf14 * i9
rf14.oe = OE
/rf13 := /i3 * /i8 * i9
+ /rf13 * i9
rf13.oe = OE
rf12 := /i3 * i4 * /f17 * /rf12
+ /rf19 * rf12
rf12.oe = OE
For the SRAM you want 8k x 8 static RAM. The two TAGRAMs need to be 8k x 8 as well like IDT 71B74 or ATT7C174.
The other parts should be self explanatory.
I did not yet build any actual clones due to the lack of machines to put them into, however the GAL formulas are tested and do work.
If someone is up to the task of funneling the functions inside those 6 GALs into one modern-ish PLD let me know (like how would I start with an approach at this?)
I might have some more projects like this in the drawer that could need this sort of work.