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SCSI, PCI and Bus errors.

coius

68030
I just spent the better part of the afternoon troubleshooting a Power Macintosh 9500 w/ a 333Mhz G3 Upgrade card (MAChSpeed ZIF Carrier) and went through hell. I can see what people mean when they talk about the cases on this. I currently have part of a fingernail torn off, several cuts on my hand, as well as a few bandages where I picked a small piece of metal right into the middle of my finger. Joy...

Also, I had been working with SCSI (Oh Joy!) and found out the reason WHY the guy before me had so many problems. This is the setup:

PCI SCSI Card (SCSI-2 + LVDS port 68-pin). This has a 18.3GB SCSI Drive on it, as well as a 4.2GB SCSI Drive. Both oddly, terminated as well as the same ID (sounds like the guy doesn't understand SCSI?)

Internal PowerMac Bus: Zip Drive. and CD-RW (8x4x24) SCSI. Both of them same ID. *NO* termination.

Then there comes the PCI problems:

Video card works. It's fine, but the guy had an ethernet card that was half-way in. I fixed that but still had problems. It turns out his USB Card wasn't functioning right.

In total, I think I fixed ~ 19 Problems with this machine. I am not sure if I have the bugs ironed out, but I have never wrestled with as many demons in my life on a computer as much as I have with THIS THING.

I threw an External DVD-RAM on the SCSI Bus (DB-25) and replaced the Zip drive with a Jaz Drive. I also moved the Jaz drive to it's own bus (main SCSI Bus) and the CD-RW is now on the same bus as the external SCSI (remember, the 9500's had two internal SCSI Buses, one shared with the DB-25 por).

The interesting thing about the SCSI Card is that it has 4MB Cache w/ battery backup for the cache. It's an Adaptec card and from what I see, this machine was a server at one point. It had some software on it but I was unable to transfer it. One thing it had on it was filemaker, but it didn't want to launch. I assume corrupted drive(?)

Anyways, I am low-level formatting the harddrives, and will put OS 8.1, OS 9.2.2 (with OS9 Helper) and 10.3 since I got the G3 upgrade. It's going to be an awesome machine.

These are the specs:

PowerMac 9500 Case and board

XLR8 MAChSpeed ZIF Carrier w/ 266Mhz G3 CPU. sadly, it's overclocked to 333Mhz, but it seems quite stable

Adaptec RAID Card with 4MB Battery-backed Cache w/ 4.2GB as ID 0 and 18.3GB as ID 1. 18.3 is last device on it, and is terminated

Iomega Jaz 2GB. 8x4x24 CD-RW (SCSI) on two separate SCSI Buses (CD-RW on external SCSI Bus)

Mach64 ATI PCI Card. No idea how much ram. Can't be much since it only does thousands @ 1152x834 or something like that...

No Floppy (was taken out for Jaz Drive)

External DVD-RAM

352MB RAM. Interleaved too!

The video card will be replaced with a Radeon 7000 32MB PCI w/ DVI/VGA/S-Video

I can't wait to get this thing up!

 
And I am starting to get those damn bus errors again. It's odd that if I reset the PRAM, it goes away.

for a bit...

 
You might want to check the power supply voltages. I've wasted more time than I'd care to admit chasing oddball problems when ultimately it turned out that the supplies were marginal. So one of the very first things I do is to check the voltages. Most of the time that isn't the problem, but it doesn't hurt to check, and it sure can help...

 
And check out the web sites for the 9500 for information about card distribution. PCI PowerMacs can be very fussy about what card works where. The most important card in your case, of course, is the power hungry Radeon video when you choose to fit it.

Also make sure that you have the latest MachSpeed helper control panel for the accelerator. It worked pretty well in my 9600 (G4/450) but didn't solve all problems (PhotoShop corrupts files but I don't use the machine for PhotoShop so I haven't investigated further; probably Level 2 cache related).

Have you tried running with 100% matched memory, fewer cards and devices, just to identify a stable set up? And, although it sounds obvious, reverse the overclocking.

 
Some of the early G3 upgrades had problems when installed in six slot Macs that weren't worked out until later. It might be possible that your G3 upgrade is one of the early ones that had issues. Moving all your expansion cards to the lowest numbered slots might help. too.

 
It was my belief that the 9500s have two PCI buses rather than two internal SCSI buses. A 9500/132 was my first PPC Mac. For that reason I retain a soft spot for the model. It's an abstract soft spot, however, because it is a brutish and simultaneously fragile machine. The structural plastics turn brittle and break even as you look at them. The effort of replacing RAM or battery doesn't need to be laboured. What inspired Apple to clad the Mac in metal and use plastic for its skeleton, instead of vice-versa, can only be guessed. Nonetheless, I had mine running reliably as a G3/400MHz/1GB/45GB for three or more years. Now it has surrendered its jewels to a Kansas 9600.

Nonetheless, there are eternal truths of the machine that an owner ignores at his peril. Of themselves they may not cause instant death and damnation, but, compounded with each other, lead to sleep-deprivation and compulsive nailbiting as a minimum.

RAM. Fill the slots, paired, with only 1.100-inch FPM DIMMs of 70ns or faster, from A6/B6 towards A0/B0. That will relieve you of one impulse towards suicide.

Place a PCI SCSI card nearest the processor (A), ethernet in B, USB/FireWire in D, and video in F.

Count your watts-per-card carefully. The 9500's PS is not nearly as well-endowed (maximum is 90W for all slots) as that of the 9600 (or even a Quadra 950).

This may provide some good reading, and this for afters.

de

 
Also, get RAMometer and test your RAM for about 1500 iterations. If any of the RAM in there is 128 MB sticks, it might be from a company called Velocity Upgrades and they shipped a lot of defective RAM for these machines. I once sent back seven sticks out of an order of eight.

You'll want to use the RAM sandwich method, as the OS occupies some memory at the top and bottom of the addresses and so prevents those portions of two sticks from being tested.

You can find extensive discussion of the RAM sandwich method in the archives for the LEM Supermacs list over at lowendmac.com.

 
I believe I Fixed it. It was some Funky ram and a the setups. Some of the RAM was interleave, where some was not. I got a mix of 32MB and 16MB and half it was interleaved, the other have was mixed. Since I got it all sorted out (taking 2 hours to do that) I got to where there were no errors. at least during the running of the system.

Thanks, I will try that RAMometer. It should point out anything that's wrong with it. This is the setup I have now:

A1 = 32MB

B1 = 32MB

A2 = 32MB

B2 = 32MB

A3 = 32MB

B3 = 32MB

A4 = 32MB

B4 = 32MB

A5 = 32MB

B5 = 32MB

A6 = 16MB

B6 = 16MB

That 9500 is weird. luckily, through perseverance, i have fixed most of this stuff. Much like the G3 ZIF Daughtercard I was given. Which btw I ordered a new ZIF processor (350Mhz) which I will overclock to between 433-466MHz. or barring that, around 400Mhz. It depends on what it's stable at.

I have the system taken completely apart, and will be testing it "workbench-style" for now, and hopefully it will be up and running soon with OS X.

Thanks guys for the input!

 
RAM checked out, and in fact, I am proud to announce that the machine is up and running perfectly! I threw the machine together, and it's running OS 9.2.2 right now (<3 OS9Helper) and will soon be running 10.3 as well (<3 <3 <3 XPostFacto!)

It's a fantastic machine, and when I get done tricking it out, it will be even better!

I've got a 350Mhz G3 w/ 1MB Cache on it's way, and will clock it up to between 433-466Mhz to get the most speed out of it (if I can that is)

Oh, and I figured out how to get the CPU running @ 333Mhz without crashing the bus. they did some screwy documentation on the dip switches, so I played around with them till I got it stable, using guides across the net that helped decode which switches does what.

Anyways, the DaughterCard in this was actually designed for the PCI PowerMacs of this range. and in fact was considered to support this machine. So putting it in this was no problem at all.

This machine was originally a 200Mhz 604e System, but I have since transplanted the 604e into the PowerMac 7500 and it runs beatifully. So that's nice. I can have a spare OS 7.5.5 Machine, and one running OS 9 *AND* OS X

Not a bad setup, eh?

 
Just doing a quick posty on this machine to let you know it's up. I will be putting OS X on this machine soon, and wanted to see how stable it is on the net. I need to adjust this browser because the text I am typing is awefully small :-/

Anyways, I got 9.2.2 on it, and am going to try to get DVD Playback on it going (i got an external DVD-RAM drive that can read DVDs :D . SCSI too!

 
From an old email I sent to the SuperMacs list:

The XLR8 instructions list integer and integer + .6 MHz bus speeds. However, it appears that the Carrier ZIF is settable in .2 MHz increments.

Switches 1 - 4 control the fine speed settings. If you imagine them as the digits of a binary number, with 1 most significant and 4 least significant, you can set any bus speed multiple of .2 MHz from 0 to 3 MHz (15 X .2) + the coarse speed setting.

So for example OFF, OFF, OFF, OFF (all OFF) is 0 X .2 = 0 MHz plus the coarse speed setting (switches 5 - 8) .

OFF, ON, OFF, ON (2,4 ON) = 0101 binary = 3 decimal. 3 X .2 = .6 MHz plus the coarse speed setting.

ON, OFF, OFF, ON (1,4 ON) = 1001 = 9 => 1.8 MHz + Coarse Setting.

Etc.

The coarse speed settings (switches 5 - 8) seem to be in 3.2 MHz increments.

OFF, ON, OFF, ON (6, 8 on) = 41 0101

OFF, ON, ON, OFF (6, 7 on) = 44.2 0110

OFF, ON, ON, ON (6,7,8 on) = 47.4 0111

ON, OFF, OFF, OFF (5 on) = 50.6 1000

etc.

=========================================

That's the gist. The stuff below is examples that drag on for a bit.

In equation form: 25 + 3.2 * (5 - 8) + .2 * (1 - 4) = bus speed;

where (5 - 8) and (1 - 4) are four digit binary numbers represented by the corresponding switches, where a switch set to 'ON' is a 1 and a switch set to 'OFF' is a 0.

So, for example, if you wanted 54.8 you solve the above equation (or read the XLR8 table and adjust your switches up or down a couple of binary values). 54.8 - 25 = 29.8. 29.8 / 3.2 = 9 + a remainder so set switches(5 - 8) to 9. This is 1001 or switches 5 & 8 ON. That's our coarse setting. 25 + 3.2 * 9 = 53.8 so we still have 1 MHz to go. 1 / .2 = 5 so switches (1 - 4) need to be set to 5 or 0101 which is 2 & 4 ON.

So 2, 4, 5, 8 should yield 54.8 MHz. Filling in the equation above just to expand the example we have 25 + 3.2 * (1001) + .2 * (0101) =

25 + 3.2 * (9) + .2 * (5) = 25 + 28.8 + 1 =

54.8.

One could more easily arrive at this conclusion by noting that 54.6 on the XLR8 table is switches 2,5,8. Adding 1 to the value of the fine settings simply means turning switch 4 on, so 2,5,8 => 54.6 and 2,4,5,8 => 54.6 + .2 = 54.8 MHz.

I imagine that speeds below 40 and above 66 are accessible and predictable using this system, though not very useful. :-)

When I first looked at this I expected to find some bizarre system because the method of setting the ICD2051 chip is truly bizarre, but it turned out simple. I imagine that's why there's a PIC microcontroller on the card. It probably runs the program that translates the simple binary switch settings into the crazy math the ICD2051 uses.

Jeff Walther

 
From an old email I sent to the SuperMacs list:
The XLR8 instructions list integer and integer + .6 MHz bus speeds. However, it appears that the Carrier ZIF is settable in .2 MHz increments.

Switches 1 - 4 control the fine speed settings. If you imagine them as the digits of a binary number, with 1 most significant and 4 least significant, you can set any bus speed multiple of .2 MHz from 0 to 3 MHz (15 X .2) + the coarse speed setting.

So for example OFF, OFF, OFF, OFF (all OFF) is 0 X .2 = 0 MHz plus the coarse speed setting (switches 5 - 8) .

OFF, ON, OFF, ON (2,4 ON) = 0101 binary = 3 decimal. 3 X .2 = .6 MHz plus the coarse speed setting.

ON, OFF, OFF, ON (1,4 ON) = 1001 = 9 => 1.8 MHz + Coarse Setting.

Etc.

The coarse speed settings (switches 5 - 8) seem to be in 3.2 MHz increments.

OFF, ON, OFF, ON (6, 8 on) = 41 0101

OFF, ON, ON, OFF (6, 7 on) = 44.2 0110

OFF, ON, ON, ON (6,7,8 on) = 47.4 0111

ON, OFF, OFF, OFF (5 on) = 50.6 1000

etc.

=========================================

That's the gist. The stuff below is examples that drag on for a bit.

In equation form: 25 + 3.2 * (5 - 8) + .2 * (1 - 4) = bus speed;

where (5 - 8) and (1 - 4) are four digit binary numbers represented by the corresponding switches, where a switch set to 'ON' is a 1 and a switch set to 'OFF' is a 0.

So, for example, if you wanted 54.8 you solve the above equation (or read the XLR8 table and adjust your switches up or down a couple of binary values). 54.8 - 25 = 29.8. 29.8 / 3.2 = 9 + a remainder so set switches(5 - 8) to 9. This is 1001 or switches 5 & 8 ON. That's our coarse setting. 25 + 3.2 * 9 = 53.8 so we still have 1 MHz to go. 1 / .2 = 5 so switches (1 - 4) need to be set to 5 or 0101 which is 2 & 4 ON.

So 2, 4, 5, 8 should yield 54.8 MHz. Filling in the equation above just to expand the example we have 25 + 3.2 * (1001) + .2 * (0101) =

25 + 3.2 * (9) + .2 * (5) = 25 + 28.8 + 1 =

54.8.

One could more easily arrive at this conclusion by noting that 54.6 on the XLR8 table is switches 2,5,8. Adding 1 to the value of the fine settings simply means turning switch 4 on, so 2,5,8 => 54.6 and 2,4,5,8 => 54.6 + .2 = 54.8 MHz.

I imagine that speeds below 40 and above 66 are accessible and predictable using this system, though not very useful. :-)

When I first looked at this I expected to find some bizarre system because the method of setting the ICD2051 chip is truly bizarre, but it turned out simple. I imagine that's why there's a PIC microcontroller on the card. It probably runs the program that translates the simple binary switch settings into the crazy math the ICD2051 uses.

Jeff Walther
8-o

Wait... so is it possible to get a 300Mhz CPU w/ a 50Mhz FSB? or is there a setting for that?

The reason i ask that, is because I don't quite understand how that works (you are talking to a math idiot here) and I understand some binary, and I understand certain switch combos = certain multipliers. But is there a way to do a 50Mhz bus with a 6x Multiplier?

 
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