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I found the pin 14 on U5 not soldered to its pad (MRASF). Got it connected up now, but still no change to the symptoms. With JP3 still set for 2MB (pads 2-3 bridged), I added a jumper wire to the side of R8 which connects to U3 pins 3 and 13, then connected that jumper to VCC. That should...

Correction: JP3 to 2-3 disables MCAS2 & MCAS3

Looks great! I cut the traces from R5 and R7 to U3, so I could land those resistors fully on their pads. It boots when the expansion RAM is disabled! Unfortunately, with expansion RAM enabled, I get a memory error 02FFFF It’s interesting, because if I set JP3 to 2-3 (2MB only, should...

I finally got around to assembling a board! I'm not 100% done yet, so no testing. Apparently, too much time had passed since I last worked on this, as I incorrectly assumed that U4F was re-implemented on the upgrade board, so I only soldered header pins in that place to connect to the IC socket...

That would be awesome :D I wonder what kind of contacts/pins would need to be sourced for that. If anyone is curious, in my searches I found only these: https://www.ebay.com/itm/225849163399

I wouldn’t recommend it. That’s what I did to my logic board while working on this project, and even with the right tools I struggled to remove those ICs without damaging traces. Since I’ve already socketed those ICs (and repaired said trace damage) on my logic board, I’m going to go ahead and...

Checking back in to say I have my PCBs and parts! Hoping to find some time to build one soon.

Thank you Builder68! This project has been a blast, and I’m happy to have cracked this with you. I’m excited to see how far you can take these early Macs in terms of performance and upgrades!

Ah, thanks for the heads up. Guess I’ll just have to log on daily :)

Oh that’s true! It’s been so long since I’ve looked into this, I’d forgotten that we still haven’t tested the 1024 refresh mod for RAM ICs which require it! You’re referring to the aux board? If so, I can try to get one made up and tie it into my prototype board. For some reason, I haven’t...

Looking forward to building one of these up, installing it, tossing my defective prototype in a box, finally buttoning up my Mac, and having some workbench space back :) Great work, Builder68!!

YES!!!!! I’m so glad you were able to get the full 4MB working! Thanks for humoring me by testing with the Mac Plus style refresh since we spent so much time trying to figure that out. I’m also glad you were able to simplify by using the system’s stock refresh. I would still really appreciate...

Here is the same link on Internet Archive from before MacGUI locked down their articles to signed in users only: https://web.archive.org/web/20220711020335/https://macgui.com/news/article.php?t=470 The noncontiguous-ness isn’t a problem for 512Ke systems, but it is for non-e systems. It’s not a...

Do you have this software? Maybe this part of the circuit has something to do with the RAM disk?

I'm trying once again to understand this portion of the circuit for the MacSnap. The output of the 74LS259 controls OEb of the 74LS253. OEb of the 74LS253 being HIGH forces its output Zb LOW. Output Zb of the 74LS253 being LOW forces the 74LS139s to only provide CAS to either CAS2F&CAS3F...

I’m so glad it worked!

Where did you find the ROM-inator patch? I can only find fully patched ROMs. Is that what you meant? I wish the source code for that project was made available. In either case, for those who have a 512K/128K with greater than 512KB of RAM and want to use the ROM-inator, it should be trivial...

Looks great! Can you test out the 512 and 1024 refresh modes? I understand your particular DRAM will not make use of the 1024 refresh mode since it doesn't have the extra address pin, but I'm curious to know if it all still functions okay. I finally finished soldering up a prototype with my...

The trick would be trying to fit this routine within the same number of bytes which the ROMinator uses for its routine. Or branch to some location in ROM which has enough unused space to fit this routine, making sure to return at the end of it. Also be sure to not destroy register data if that’s...

Interesting! So it’s essentially checking for ROM mirroring at the address at which the SCSI IC would reside. Getting back ROM data indicates ROM mirroring, thus no SCSI. Getting back something other than ROM data indicates no ROM mirroring, thus SCSI is present. Very clever! I wish the creator...