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@Arbee Do you have any doc that describes DFAC-II, especially its I2C control stream?

Many thanks! Those ERSes were helpful to spot differences between the original ASC, EASC and the sound cell inside the Prime Time II. Below some notes I compiled from various sources: ASC registers: 0x800 - chip version: 0xB0 - Batman, 0xBB - Wombat, 0xBC - Sonora, 0xE0 - Elsie 0x802 - chip...

Is there any manual that describes ASC/EASC registers? Everything I got so far is a commented assembly for the startup bong located in the Cordyceps ROM that reveals merely sound register names. Their layout can be partially guessed from the comments.

Valkyrie AR looks like the same core chip used in Power Macintosh 5200 and 6300 albeit with a slightly different address decoder. It's definitely very far from the chip described in the said document.

@dougg3 Your ASC Tester could be used to test the Cordyceps Power Macintosh boards (PM 5200, PM 6300 etc) because those mostly re-use Quadra 630 HW with the exception of the CPU. I already implemented a basic emulation for those Macs in DingusPPC. The ROM code for playing the startup bong...

I'm aware of the said unrolled loop - it's part of the old SCSI Manager 4.3. It doesn't cause any issues in DingusPPC because the 53C9x will generate an interrupt after some amount of data has been transferred: either function complete when the transfer counter drops to zero or bus service...

No. Apple engineers call it pseudo-DMA. It's supposed to work like that: an I/O ASIC provides a special HW register whose content will be moved over the real DMA interface to/from the target device. In PowerMacs, it's mostly the Curio ASIC. The I/O ASIC provides all required signals for the DMA...

I've mistakenly linked a wrong post. The correct post is here. You're right - that's a Orange386 card with two ISA slots that uses the ACC 82021 chipset.

I'm not sure. The card I'm describing looks like that. "Orange386" listed on Apple Rescue of Denver looks different - I see neither 82C936 chipset nor 486 CPU. Anyway, it's good to know that Orange386 requires its own software package.

It looks like there are basicly three different OrangePC 200 Series cards: the card with a 386sx/Cx486SLC and single ISA slot whose DeclROM contains CPU_80386_OrangeMicro_OrangePC will be indentified as "OrangePC" in the application. Because that card uses the 82C836 chipset, the application...

I suppose there is no way to read out A1020 configuration without decapping the chip and doing some time and cost consuming IC RE. Do you have a list of ICs used in the Orange PC 200 cards handy? Everything I got so far are two high-resolution pictures of two boards. The markings of some ICs...

I discovered the following HW details so far: At $FS040000, where "S" designates the Nubus slot the card is inserted into, seems to contain some kind of HW register. The OrangePC application accesses it at the very beginning. It's read two times and written once with $106C. It must implement at...

Sounds interesting. You assume that FPGA provides a data path that pushes video data generated by WD90C30A to the Macintosh frame buffer over Nubus, right? In the meanwhile, I started on hacking the OrangePC application in a specialized fork of the DingusPPC emulator. I created a mockup for a...

I wonder what function the Xilinx FPGA (U44) implements. Judging by its position it does something related to the Nubus interface. The XC3000 datasheet tells us that XC3042 is a FPGA. That means that it needs a configuration program stored in a EEPROM/SROM to be operational. Do you have any idea...

Is the above Orange386 card from the OrangePC 200 series? I assume it's a Nubus card. The question is where the Nubus interface is implemented. I see a Xilinx FPGA (U44) and a large IC right above it (U67). Unfortunately, the sticker "90 ATC 01020" hides the chip markings. It would be great to...

Thank you for posting the initial dump! Those cards have been shipped with the stock Power Macintosh 7100 and 8100 so it's important to preserve their DeclROMs.

Yeah. I'd appreciate a full dump of the real DeclROM though. I also wrote an initial HPV emulator to be able to analyze its PrimaryInit. Believe or not, both register initialization loops right at the beginning are buggy - they assume DAFB registers to be at 4-byte boundaries but the real HW...

@joevt I added the reset data given here to my manually composed DeclROM dump and voilá - the CRC from the FHeaderRec of the real ROM matches now :) PDS_Reset routine in the PDM ROM finds the signature and resets the card as intended by design. Here the faked DeclROM dump for your enjoyment:

Many thanks in advance! BTW, I manually composed the 128K HPV DeclROM from the first 64K of the dump that looks valid, padded with 64K of zeroes and the FHeaderRec provided by SlotDump. The CRC calculated by DingusPPC's nubusutils doesn't match the CRC from the header. That means that the real...

Yeah, numToCover needs to be 128K for the HPV and AV (Planaria) DeclROMs. I suppose they contain the reset signature described here in the last 256 bytes of the ROM. It probably wouldn't be dumped if numToCover is too small. WriteAllBytes would be helpful, especially if it could dump the ROM...