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I have an SGI and a couple of HP-PA HPs somewhere, but I don't like them the way I like my SPARC. By now, the primary reasons is lack of documentation. Sun documented a lot of things very well, as they had to support clones, and they also pushed for standardization (SBus, SPARC itself). I was...

All of those standards had two things in common: (a) they were, or somehow became, standard (!), so you could get them from multiple vendors, driving costs down (b) as video standard, they were all (I think) "chunky color", dumb (no acceleration) direct-access framebuffers (same as Macs and most...

My long-standing position is the Amiga died *because* of its "amazing" chipset, while Apple survived because of the lack thereof and the willingness to break some stuff during the Plus => II transition. With the "amazing" chipset (Amiga and others of the era), software is tied too closely to...

It seems I should clarify my "era" comments :-) I didn't mean the whole 80s/90s, but specifically the era for which @noglin put a result table - when Apple moved from the '040 to the PPC601, Intel from the 80486 to the Pentium, and the RISC vendors were moving from their early implementations to...

And for fun (I was near the system and only needed a reason), NetBSD 9.0 and gcc 7.4 on a SPARCstation 5/110 (110 MHz MicroSPARC II): ==========================ORIGINAL BYTEMARK RESULTS========================== INTEGER INDEX : 1.237 FLOATING-POINT INDEX: 0.659 Baseline (MSDOS*) ...

I haven't looked at it in while, but I suspect the Byte benchmark is not realistic. Measuring a bunch of small loops isn't very representative or data-dependent branch-heavy code that interactive programs use. The strength of SPEC was it was bunch of real-life codes, so was representative of...

You are of course absolutely correct, there's two VIAs there, the single SCC is at $5000_4000. Too late to edit though :-(

To define "further decoding", the safest way is to start by defining "decoding" :) So here's a not-so-little primer on building a system based on the MC680[23]0, which I will shorten to '030 from now on. We will only consider physical addressing, as it's the one relevant for the question. And on...

No, even in System 7 (didn't try older) you have multiple functions handling one interrupt. They need to check if it's "their" interrupt, if yes they handle it and say so, if not they ignore it and say so. If ignored, System 7 calls the next handler in the order of priority. NuBusFPGA uses it to...

It was a while ago, but from memory Word 5.1a always opened a "full screen" window when opening a document. On the small resolution of the era, and usually with just the one application running (or alongside maybe Excel 4 if you had enough memory and some dynamic inclusion of Excel stuff in the...

I didn't even know Epson made graphics devices... I'll have to look them up for my own education, thanks for the reference. I didn't try any 6.x (the *FPGA require 32-bits mode with their 8 Mib framebuffer), but 7.1 worked in Qemu using the Monitor control panel, through 'options'. In there you...

First, great job! What controller did you end up using that you could make compatible with the '030 bus? About cscSetEntries - how many entries do you end up writing in the CLUT? In the *FPGA, I'm writing one more than I think I should (csCount + 1 instead of csCount), but if I don't one color...

RTC and TBL interrupts (maybe others) running normally means some activity on /IPL. But nothing happening on the faulty one, so devices aren't running so presumably they weren't set up. I've run out of ideas for external causes to the CPU. Seems like the CPU is faulty or trapped in a software...

It means on the good board things are working (restating the obvious there ;-) ) but you did not observe bus mastering activity - which might very well be normal. Weak signal on /BG but if it works it's OK. On the faulty board, nothing is happening on the bus. Which means the CPU isn't doing...

Then you will need to check what is really going on the bus, which is more complex. There's a couple of situations (a) there's an ongoing transaction that is neither failing nor succeeding, so nobody is doing anything (b) someone has the control of the bus (either the CPU or another bus master)...

Checl also /HALT, it will also prevent the CPU from doing anything if stuck low.

Emphasis on the 'might'. Beware that: (a) applications that use FP instructions directly just won't run on the LC version (b) applications that don't use FP at all, or use it via built-in emulation, will not benefit from the FPU in the non-LC (c) applications that uses SANE, or applications...

@Jockelill was willing to give it a go, so with an appropriate bitstream (to use the proper clock signal and pseudo-slot number, IIsi and SE/30 are $9 while the IIfx and LC3 are $E) he gave it a shot - and it works! Though the position of the HDMI connector will prevent the case from closing...

Makes sense. Thanks for the confirmation. If that board was released as late as '98, or even in '97 or '96, spending money on acceleration for systems already obsolete twice (CPU first 68k->PPC '94, I/O second NuBus -> PCI '95) and unlikely to cause any additional sales doesn't sound like a...

'sVidAuxParams' isn't awfully well documented... google only finds it in your thread about the Thunder II @ 1600x1200 (which I had forgotten and where you already mentioned this... not getting any younger it seems). It has an entry 123 in the appropriate header (the one you quoted), and that's...