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The more I think about it, the more it actually makes really sense to me, and would play highly in favour on the choice of components I already did for this design. Let me make a proposal: if anybody is willing to send me a working 68040 based NeXT computer, I would be willing to do a dedicated...

It's all a matter of when the FPGA drives the Data lines for the SDRAM buffer ICs. Everything else should be fine, as the whole address bus goes through a series of 74LCX244 level shifters. So I just need to sample the addresses and data at different points in time. Now you really got my...

For the LC475, this is fine, since the accelerator makes the usage of the SIMM slot obsolete. You can see I purposely set the board layout so it doesn't collide witn the SIMM slot brackets and the battery holder, therefore, this is working as intended. ;-) For the Quadra, I completely need to...

So, hardware is complete, including adaptor board. ;-) I guess it's now ordering time for PCB and parts.

I'm living in Germany, but I got the Quadra 650 for cheap, so no issues here. The biggest challenge here is clearly to get the 68060 supported as best as it can be, and for that, I will somehow need help from the community. Eventually, I think I can also do this by myself, but it will take...

Absolutely. :-) As @zigzagjoe said, I can't promise whether a similar approach as the MAC card will work on NeXT, but I am definetely interested to, at least, contribute in reverse engineering the design, as I can trace all CPU activity on my card, which is a feature I can also use on the NeXT...

Sounds great, I was also thinking about whether adding MAC as an m68k platform would make sense for Linux Bootloaders such as UBOOT. Gathering from the MEMC(jr) description and source code, setting up the memory and display shouldnt be complicated. I was actually thinking of doing this for the...

Most of the 060 Amiga accelerators have an internal ROM, which gets called during the early boot process. It either just disables the FPU (the AmigaOS can completely boot on an 060 without CPU support library in this state), or installs the CPU support library, which has been introduced in...

Yes, there was the original intention to provide an L2 cache on the A3640 CPU card, but it was cut due to cost reasons, with Commodore basically going downhill since around 1991-92. Once you design an accelerator for the Amiga which uses local memory, the system performance substantially gets...

The problem with the Apollo Core is that it neglects compatibility where necessary, and adds features which do make sense from an FPGA implementation POV, but will always remain proprietary. It is aimed at creating a new platform, using a previous OpenSource recreation of the AmigaOS as a base...

I was talking from memory cycle POV. As I said, I can clock the memory 1x, 2x or even 4x the bus clock to miminize first access penalty. I assume that a simple "060 style" DMA coherency mechanism would be too complex for your approach? Reading the MEMC(JR) documentation, I am actually quite...

That's good to know. But I can actually support DMA transfers, given that no other slave on the bus will attempt to terminate/acknowledge the bus cycle. Interesting, because the schematics of the LC475 would imply that the NCR can do DMA via Prime Time. On the Amiga 3000, SCSI does support...

Thanks, @zigzagjoe has provided to me the necessary datasheets, so I can have a better overview how the functions are related to each other. I assume that the ROM also defines which video modes are available based on the state of the mode pins of the video connector, correct? (much like a...

Hi everyone, that's what I sort of expected after doing some initial research. I mean, coming originally from the C64, I'm not that unfamiliar in getting "my hands dirty" in delving into low-level bootstrap code, which sort of has an underlying structure, but was never documented or defined in...

Hello Mac community, I joined MLA68K 2 days ago, because I recently acquired a Macintosh LC475, which I have started to like a lot due to its compact size, and actually very good performance. Most people know me in the Amiga community, where I have started several hardware designs ranging from...

Well, then let's make it a real project now. :-) I start a new thread.

Something like this: Supports 68040 / 68060 CPU (selectable via jumper) 128 MB SDRAM, up to 100MHz (either 1x or 2x bus clock) CPU clock up to 100MHz (060), 50MHz (040) Bus clock to mainboard can be 1/2 or 1/4 2MB flash rom for early boot code / patching of MAC OS rom "RECOVERY" jumper, if...

I have looked at it, and there seems to be code which is related to adjusting the stackframe handler for 68060, and also FPU related code. Otherwise, yes, the incompatibilities on instruction set level should be handled by the FPSP/IPSP code from Motorola, which on Amiga, is part of a specific...

Btw, if you ask me, disabling access to the on-board RAM and, instead, implementing the SDRAM controller directly on the add-on board could be a much more easy and faster way. Does every Mac locate its Ram at the same base? Or is it fragmented in a way to provide "24-bit" addressing support?

Hi, firstly, congratulations on getting the 68060 running on a native Macintosh. I'm coming from the "other"side (Amiga), but recently acquired an LC475 which I am currently getting familiar with. One hint regarding the patching of the Mac Roms to get them fully working with the 68060: have...