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When the 68000 is reading or writing from the bus, it asserts the address lines and then asserts /AS to signal that it is either waiting for data to be put on the bus or it has put data on the bus. The 68000 then waits for /DTACK to be asserted by logic somewhere else to signal that the other...

It's part of the timing for things like the required refresh windows and a few other cases. It effectively disables the 4 select lines.

As far as I know that /OE pin only goes to the pull-down resistor and a test point, but I can check again. U4G is mostly just for generating /DTACK, RAM card /CS, and refresh signals for the RAM.

You mean that forcing AKD high turns it on? It seems like the 74HC133 at U13L may be bad, either that or a bad trace. If you can check pin 16 for 5V to make sure it's getting power, and check continuity between pin 9 and R189 then between R189 and AKD. R189 is on the backside so if it's too...

It looks like it was probably trying to write 0x00100000 to location 0x00100000, but it read back 0x00FF00FF instead. There may be an issue with accessing the lower byte of the RAM on the expansion card, for example a select line that is not making it from the CASPAL to the expansion card.

For disassembling the ROM I would recommend using Ghidra, it nearly works out of the box, though you will need to deal with Line A instructions in some way. There are a few different patches around online that you can add to the disassembler, or you can do it by hand just setting each one as a...

Too bad these probably aren't archived anywhere online that I see. One thing I'm curious about is if you can find any mention of the Macintosh Portable Japanese Upgrade Kit or any pictures showing the Macintosh Portable with a Japanese keyboard. I know they exist but I can't find any...

You could always put all of the memory space in the "fast RAM" and only access the logic board RAM when needed.

Off the top of my head, most things are going to rely on system globals such as MemTop, ApplLimit, BufPtr, etc. I believe those are some of the values that the system will use when determining how far it can go with application heaps and stacks. It may just be easier to have a patched ROM on...

There are around 24 bytes in just that space, or more if you get creative. Depends on what you want to do with it. You could patch the check out entirely and just hard code it, or find some reliable method of detecting what hardware you're on.

It wouldn't be too difficult to patch the ROM yourself, assuming you have some easy way of writing the changes to the ROM, either by programming the chips externally or with software on the Mac.

Q1 is just for charging, so it won't really affect turning on the computer unless the battery needs charging. 0.5Ω sounds perfectly fine for the fuse. If it was more than maybe 10Ω it would be a little suspicious but that fuse sounds fine. Since SYS_PWR* appears to be high and assuming the...

If a signal is switching between high and low the multimeter probably won't be fast enough to track it, but a steady signal like something that is staying on or off it should be able to see. Just put the negative probe on a good ground point like the shielding on the various ports or the...

Were you able to check any of the signals involved in powering on the computer? The main +5V is controlled by SYS_PWR*, which is controlled by the power manager. Some possible causes for the main +5V not turning on when the standby +5V is working: SYS_PWR* is being asserted but the main +5V...

I'm guessing the issue might just be the way the ROM-inator code is detecting a Mac Plus. The original code checks to see if the ROM is mirrored, since the Plus does not mirror the ROM: clr.w HwCfgFlags move.l $420000,D0 cmp.l $440000,D0 beq.b .noSCSI move.b...

The RP2350B version is particularly interesting, the 48 GPIO pins opens it up to interfacing with a lot more stuff.

I remember the drives typically showing up in the logs at the very least even when they're not quite working, either just telling the bus they aren't ready or giving read errors. I think all my old logs and documentation is on another computer so I'll have to look because I can't remember.

I think the ROM overlay is usually 0x000000-0x1FFFFF, so I'm not sure why it would ever end up at that range. That part of RAM should only be a repeated image of the RAM, especially since video and sound memory is at the end of the RAM space. The stock Mac Plus ROM checks if the ROM is mirrored...

Did you ever nail down a pinout of the Outbound side connector? Also I'm curious if you've determined if the card is doing any address decoding to prevent Outbound memory space access from reaching the SE.

It looks like it brings pin 15 high/disabled for writes to 0x200000-0x300000. I don't know why off the top of my head though.