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Looks like one of the 4MB max upgrade boards, maybe RamPlus 4 or something. Though I'm not sure, it looks like about 2MB there right now. Maybe it's the One Plus One.

I believe according to the ROM, 0x3 is the major error returned by the RAM test. A minor code of 0x00FF likely means that 16 bits did not compare properly when running the modulo 3 test, and because of how that test works I don't think it can pinpoint a specific chip. My best guess with 0x00FF...

The Data Strobe Acknowledge (/DSACK) is used to control the number of wait states. The processor asserts the Address Strobe (/AS) and the Data Strobe (/DS) to signal that the address is valid and data is ready to be placed on the bus (for reads) or has been placed on the bus (for writes). With...

It was available at least on the Portable, not sure how much earlier than that it was. The Portable for example would check for "SLIM ROM" at 0xE00000 and start code execution from 0xE00008 if found. There's also the checks for EDisk and Ginty ROM disks a bit later. I think some later sources...

I would think the PDS portion would just be for ROMs on PDS cards. ROM expansion using PDS was available on many models and many could even have a bootable ROM disk. I could imagine it being a handy way to update files on the ROM disk. As I understand you could also have "ejectable" ROM disks on...

We start at 32678 or 0x8000 since this is the second half of the 27C512. Since we are skipping the first 4KB we add 4096 or 0x1000. Then we add 2048 or 0x800 for each 2KB ROM. 32678 0x8000 + 4096 0x1000 36864 0x9000 + 2048 0x0800 38912 0x9800 + 2048 0x0800 40960 0xA000...

Addressing is a bit confusing, but it's mostly just a lot of math. The original ROMs are 2KB, or 2048 bytes. 2048 in hex is 0x800, and 4KB or 4096 is 0x1000. A 256Kb or 32KB ROM like the 27C256 would end at 0x7FFF, and the 512Kb or 64KB 27C512 would end at 0xFFFF. Every address line will double...

This seems correct based on the manual: Well if you use a 27C512 in place of a 27C256 then what was previously VPP is going to be A15. Since VPP is held high in normal operation of a 27C256 this means A15 will always be high, so nothing below 0x8000 will be read. So I believe that means the...

Did you take a look at IC51? Either it's not getting enough voltage on input pin 2, something is drawing too much current on the -5V (other faulty components such as capacitors), or the UPC78N05 is faulty.

The top case does seem a little to suspiciously well made to be third party and still include the Apple logo. Seeing the inside and injection mold marks will probably reveal more.

Well the middle leg of Q20 should connect directly to the SCSI +5V, so if you're seeing 5.2V there then you should see it on the SCSI pins as well.

It comes from Q20 to the left of the battery connector. The gate of Q20 is connected to R173 on the bottom side, which then goes to the Power Manager. I believe the Power Manager should be pulling the gate low when the SCSI +5V is on, so you should see near 0V on the gate.

It might be the same sleep issue that the Macintosh Portable has with ZuluSCSI RP2040/BlueSCSI v2. I think the transceivers assert SCSI control lines on power up because the RP2040 hasn't initialized, which causes the SCSI controller to fail initialization.

You're right, I was reading the schematic too quickly and just read the "SCC" part :) That is an odd resistance you're getting, even if I charge the capacitor up on mine I still get 10kΩ, sounds almost like you have current leaking somewhere. Easiest thing might be to try removing the button...

The NMI button should be going to the SCC, not the Power Manager, make sure you're not checking the reset button. Are you able to check the NMI line with a scope or logic probe to make sure it's always high unless pressed?

1SMB5928 probably works fine, I think it's J-lead but should fit. The gull wing style like the original seems harder to find.

I pulled one out to test, looks like a 13V Zener diode somewhere around the SMB or DO-215AA package size.

It's more likely for reverse polarity protection. Except now it's failed and current is flowing in both directions.

Yeah, I'm guessing high is the default. The data sheet for the 1736A is a bit confusing because it shows the reset net label as active low, but it looks like according to other parts of the data sheet it's active high. It is strange that the 1736D setting isn't working, as it shouldn't be that...

The interrupt usually triggers the debugger if the system is booted, or during startup will typically give you a "Sad Mac" error which is normal. Typically there is a dedicated interrupt ⎉ button, but I think on the 540c does not have one, you have to press Command⌘ + Power to trigger the...