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Sure, but again, the ROM monitor is for development / emergency use cases only, and not really an operating system in itself. I try to keep it as modular as possible, but also simple, with a size <=32k. I'm writing a very simple I/O system, which includes the basic support for Serial, Keyboard...

Some question to you guys - as I said, I am currently writing the low-level boot ROM for the card, which can autodetect the System (Amiga/MAC) and also defines a system "sub-type" identifier. On the Amiga, this is actually relatively straightforward, because the sub-type can be reliably...

Thanks, yeah, this would basically be my intention. But it must work first. ;)

I suppose that must be viewed by use-case. Regarding FPU-heavy applications, I suppose the same limitations apply to any MAC, which has no FPU, like an 68LC040. On the other hand, every LC060 has been manufactured in 0.42um process (they even do have a dedicated mask set), so they can ALWAYS...

Speaking of DOING, PCBs are now ordered. ;)

As I am a semiconductor guy, I would always propose solutions which are in-line with the actual design process of semiconductors. ;) That's how I personally derive my definition of judging what is "real hardware". But, similar to the Amiga community, there are no uniform standards on how to...

Well, then I better get started on the low-level monitor software then. ;-)

The more I think about it, the more it actually makes really sense to me, and would play highly in favour on the choice of components I already did for this design. Let me make a proposal: if anybody is willing to send me a working 68040 based NeXT computer, I would be willing to do a dedicated...

It's all a matter of when the FPGA drives the Data lines for the SDRAM buffer ICs. Everything else should be fine, as the whole address bus goes through a series of 74LCX244 level shifters. So I just need to sample the addresses and data at different points in time. Now you really got my...

For the LC475, this is fine, since the accelerator makes the usage of the SIMM slot obsolete. You can see I purposely set the board layout so it doesn't collide witn the SIMM slot brackets and the battery holder, therefore, this is working as intended. ;-) For the Quadra, I completely need to...

So, hardware is complete, including adaptor board. ;-) I guess it's now ordering time for PCB and parts.

I'm living in Germany, but I got the Quadra 650 for cheap, so no issues here. The biggest challenge here is clearly to get the 68060 supported as best as it can be, and for that, I will somehow need help from the community. Eventually, I think I can also do this by myself, but it will take...

Absolutely. :-) As @zigzagjoe said, I can't promise whether a similar approach as the MAC card will work on NeXT, but I am definetely interested to, at least, contribute in reverse engineering the design, as I can trace all CPU activity on my card, which is a feature I can also use on the NeXT...

Sounds great, I was also thinking about whether adding MAC as an m68k platform would make sense for Linux Bootloaders such as UBOOT. Gathering from the MEMC(jr) description and source code, setting up the memory and display shouldnt be complicated. I was actually thinking of doing this for the...

Most of the 060 Amiga accelerators have an internal ROM, which gets called during the early boot process. It either just disables the FPU (the AmigaOS can completely boot on an 060 without CPU support library in this state), or installs the CPU support library, which has been introduced in...

Yes, there was the original intention to provide an L2 cache on the A3640 CPU card, but it was cut due to cost reasons, with Commodore basically going downhill since around 1991-92. Once you design an accelerator for the Amiga which uses local memory, the system performance substantially gets...

The problem with the Apollo Core is that it neglects compatibility where necessary, and adds features which do make sense from an FPGA implementation POV, but will always remain proprietary. It is aimed at creating a new platform, using a previous OpenSource recreation of the AmigaOS as a base...

I was talking from memory cycle POV. As I said, I can clock the memory 1x, 2x or even 4x the bus clock to miminize first access penalty. I assume that a simple "060 style" DMA coherency mechanism would be too complex for your approach? Reading the MEMC(JR) documentation, I am actually quite...

That's good to know. But I can actually support DMA transfers, given that no other slave on the bus will attempt to terminate/acknowledge the bus cycle. Interesting, because the schematics of the LC475 would imply that the NCR can do DMA via Prime Time. On the Amiga 3000, SCSI does support...