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One of my 475 devices is stable up to 50MHz (assume serial is not working), and crashes at 52MHz.
Configuration:
68040RC40
MC88916DW80
70ns internal RAM
60ns RAM module
60ns VRAM
55ns programmable ROM module
So you are lucky with 60ns internal RAM.
If you are able to compile the extension by...
Next I need to find some place for additional code.
As I am operating an LC 475 all code for Wombat boards is not used.
This check if board is a Wombat board as jump to the Wombat only routine if yes:
408A014A: SIZEMEMORYPATCH+$014A: MOVE.L $5FFFFFFC,D0
408A0150...
If I am not able to mark internal RAM as bad maybe it is possible to set size to 0.
Code below is calculating size of each bank.
If memory is found, size and total size is set with
408A027C: SIZEMEMORYPATCH+$027C: OR.B D3,D5 ; 'OR' in 'n' (size of this bank)
408A027E...
Thank you for the hint.
So I need to dig a little more into depths.
First I rewrote cy384's "ultra wombat hax tool" for MEMCjr in 475.
There are only 5 memory blocks accessible by MEMCjr:
bank 0 is 4MB onboard RAM (70ns)
bank1 and 2 are the 128MB SIMM (60ns)
As the SIMM is double sided it...
Within my LC475 there is 70ns onboard RAM and a 60ns RAM SIMM and a programmable ROM module.
Due to speed reasons I like to disable the onboard RAM.
Prefered solution is changing the code in ROM so the onboard RAM is no longer used.
I am quite sure that I found the place in ROM that initialize...
You can figure that out from the pins of MEMCjr.
101 = 4 That one with the white triangle and the via
103 = 3
102 = 2
126 = 1
You may also check that 5 is connected with pin 4 of all onboard RAM chips
6 is connected with pin 34 and 44 of RAM SIMM socket
7 is connected with pin 33 and 45 of...
Bolle said: Will work without onboard RAM in https://68kmla.org/bb/index.php?threads/faulty-performa-475-mainboard.48880/
As a RAM cycle seems to have either 2,5 or 3,5 CPU cycles
80ns RAM will work up to 43MHz
70ns RAM will work up to 50MHz
60ns RAM will work up to 58MHz
with 3,5 cycle
My...
Ok, I did a mistake. Based on PrimaryInit.a address of IsSlowClock is not +1 but preset is 1.
PrimFrame RECORD {A6Link},DECREMENT
return DS.L 1 ; return address
A6Link DS.L 1 ; placeholder for...
Are you able to give some information, where to find that code in ROM?
Based on the MEMCjr manual I assume it is changing bit 8-11 in Frame Buffer Configuration register.
This register is located at $F980 0010.
I was not able to find any place in ROM that contain $F980 0010 nor code that is...
I have a programmable ROM SIMM for my 475 now and can share some experience:
- The ROM file in the first post is the same, that is available at CayMac Github site as well.
- As expected the ROMdisk does not work with a Harddisk
- Using BlueSCSI and CDROM changer pressing R at boot start from CD...
MEMCjr datasheet is asking for 80ns VRAM for 20MHz and 25MHz and 33MHz with and additional wait state.
40MHz require 70ns VRAM and additional wait state.
In my understanding VRAM can either use 2 cycles or with additional wait state 3 cycles.
25MHz -> 40ns/cycle -> 80ns ok without additional...
Board now reacped with all OS-CONs
Board is working.
5x 10SVP56M 56µF 10 V for 5V and -5V
4x 25SVPF47M 47µF 25V for 12V and Booster
2x 16SVPC100M 100µF 16V for 5V and -5V in audio section
All capacitors were within +-5%
While recapping a 475 board i started it without ALL 47µ capacitors successful so I do not expect missing C127(-5V) and C128(12V) would create an issue.
Now there is System 8.1 installed. Monitor control panel that came with System 8.1 is Version v7.5.9.
I tried all combinations of Control, Shift, Option and Command while opening Memory control panel: No additional Choice for Startup appeared.
It is quite probable that the screenshoted Version...
I tried all combinations of Control, Shift, Option and Command while opening Memory control panel of System 7.5.5: No additional Choice for Startup appeared. I had a look into resource fork as well, no text or Icon found that would fit.
I will install System 8.1 on another partition later to test.
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