Follow along with the video below to see how to install our site as a web app on your home screen.
Note: This feature may not be available in some browsers.
Hello MLAers! We've re-enabled auto-approval for accounts. If you are still waiting on account approval, please check this thread for more information.
@KGLlewellyn has one of these too, see thread Cabletron NuBus Ethernet Card Drivers - E6110-X . That card is working.
Edit: ah, it's not identical, but appears to be a very close relative. Different oscillator for the NIC chip; one of the 555s is unpopulated; different delay line chip beside...
The FPGA tool's map for this card does paint a picture of an under-utilized FPGA.. a lot of it is unused, which is what sparked my curiosity in what the card side of Nubus needs to do. I presume just address decode to select the network chip or the buffer RAMs, you mentioned lane management, and...
@zigzagjoe .. that bitfile visualizer is neat. Thanks!
I am not well-versed in FPGA internals. But from what it shows, many CLBs are using inputs that are unassigned. Assuming such inputs serve as constant 0s (or 1s), in many cases they render the function into a constant. Which seems like a...
I slowed the clock down (considerably..) and now have a bitstream with correct header and trailers on all frames.
The 42-byte pattern may have been the PROM's internal counter being overdriven by my original clock, and hence not properly updating all eight counter bits.
3853 bytes recovered...
@joevt Thanks for the DeclROM detail! And also for noticing the repetition in the FPGA bitfile data. I've been looking at it in binary (e.g. previous reply) and focusing mostly on the header, so I had not noticed that.
I'll review my dumping code once more before I blame the chip. 42 is a...
Aha, my Atmel code to read the FPGA's PROM dropped the very first bit. Now the decode of the corrected PROM dump at least shows a coherent header. But then the frames still go on to conflict with the document, which seems to require each frame to end with 0b111 .
So it depends on whether or not...
I probably have the wrong zip utility.. I could not unpack the SlotsDump. I'll try other utils (and other downloaders) again soon.
TL;DR -- Seeking more info on an obsolete AT&T FPGA at the heart of this problem. Two big asks.
Details:
I dumped the (socketed) DeclROM by reading it with an...
Oh, sorry if I misspoke. I haven't set up a legacy Macintosh build world, and the Github had no app/pkg/binary download that I saw... so I was OK with doing a few peek/poke style accesses with a debugger, rather than jump-starting my someday developer bench. No slight intended! I do want to have...
Cool, thanks! I'll do that perhaps tomorrow with MACSbug.
Today I scoped the FPGA's config PROM lines and it looks like the FPGA is properly initializing at power-on. There were glitches on the data line, though perhaps just due to my scope (Saleae). The bitfile in there has no checksumming (if...
Hey all. I have a Nubus network card that looks to be in fair shape, but which does not appear at all to MacTest, TattleTech, or MacEnvy.
After searching here, it seems the most optimistic theory is the card's DeclROM is not responding or has bit-rot. Are there any apps that ignore the system's...
The saga continues 🙂
The first unit remains absolutely stable.
The second unit has two issues.
First and foremost, the PSU remains dead. I recapped it a while ago. I overhauled it including down to the daughter boards and found possibly cracked high-wattage resistors and a very discolored...
OK, it's the PSU. It's driving 13.5V onto the #PFW line, with or without a logic board.
I replaced a triac and two power FETs in the PSU before I knew #PFW was over-voltage, because I was in there and had the exact replacements already on hand. It was a simple swap and I hope I did not...
Relay is good. Oh, well.
Skipped lunch, extracted and took photos of the daughter card. It has pencil markings on it indicating the values of a few caps and resistors, on the right hand side of the photo. Either they were written by the assembly engineer, or I am not the first to open this...
Not really sure of how to debug a PSU, but I have it 'exploded' for probing. Makes me nervous to have it there, guts open to any accidental contact! I've done all the basics I know to do: continuity testing, reflow, check for shorts. It does provide a clean 5.199V on the trickle rail. I recapped...
Cancel that. I measured it in circuit. Shortly afterwards, I realized my mistake, dismantled the PSU again, and measured the thermostat after removing one of its leads. It's fine.
And now I have somehow broken the PSU. Too many awkward dismantlings and reassemblies. It won't power up. More...
Inspected the suspect PSU. The only suspicious thing was the thermostat. It closes on high temperature (105dC), and at room temp should be open. It was showing 105kΩ. I do not know if that 'counts' as open. Still an active part and in stock, so I may order a new one, just as a hope.
Kemet OHD3-105M
Somewhere, I once found a detailed write-up of the logic gates in the Iici/IIcx logic board PSU control, the state machine they drive.. which helped me choose the probe points to debug this same issue. I've been searching and have not found it again. Anyone have a pointer?
Summary: decalring victory with the first IIcx. Second IIcx now boots, but there's a (possibly single) problem ...
The first IIcx appears to be 'done'. I took the RasterOps video out of it, leaving it with the Ethernet, 8*24 video and an empty slot; I hope someday to find an 8*24 GC to round...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.