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I did the 128k->512k (chip upgrade)->1Mb (second row of chips piggy backed on the first) back in the day (and a hard disk with an interface that sat in the eprom socket under the eprom), it's been a while, but I seem to remember there was a TTL jellybean to decode the RAS signal for the...

I'm mostly OK - MRI shows 2 small holes in my brain, one explains why I suddenly couldn't type with my right hand (that came back quickly), the other is a mystery, hopefully it was something I'll never need like highschool latin - but you don't know what you don't know - I came off amazingly lightly

Oh sorry, I got it half written and then had a (very minor) stroke which sort of knocked me flat for a few months, I'll get back to it

So SQuiD's main job is as an accelerator but it's also part of the datapath when you access from nubus in 8-bit mode copies those 32 data bits to/from the red bank, in 24-bit mode it reads/writes 32-bits to/from each bank and does a 4:1 mux to make 24 bits from/to nubus - some of those 37 bits...

(I designed SQuiD ... and did the high level architecting of the other SM accelerators) There are 32 data bits between SMT and SQuiD, some arbitration (probably 2-3 bits) - I can't remember how ras/cas/addresses are shared. In 24-bit mode only 24 of those 32 data bits are used (most...

I made a 1Mb 128k (piggy backed chips, didn't use a PAL, it was a 74LS jellybean of some sort)

(I'm one of the original A/UX developers) mac cards need a special resource in their slot roms for A/UX, not all of them have it (I forget the details, even though I wrote the original spec, it's a little bit of code that knows how to change modes)