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  1. J

    My Mad B&W G3 Setup!

    The 1.1.1f4 Power Mac G3 (Blue & White) Firmware Update 1.1 says it can update these versions: Apple PowerMac1,1 1.0b4 BootROM built on 11/06/98 at 09:04:50 Apple PowerMac1,1 1.0f3 BootROM built on 12/08/98 at 17:37:15 Apple PowerMac1,1 1.0f5 BootROM built on 02/15/99 at 18:06:39 Apple...
  2. J

    My Mad B&W G3 Setup!

    I've only seen one ROM for the B&W G3. And there's a patched version for G4 upgrades. I have a Rev 1 B&W G3 with G4 patches. 1999.0409 111f4 4e40465a.b9c7f354.db26f354 "ROM 3.1.1f4 B&W G3 0" 1999.0409 111f4 c1a05781.04f7f36d.a70af36d "ROM 3.1.1f4 B&W G3" # Between the original and...
  3. J

    Does anyone have a 667MHz or 800MHz Powerbook G4?

    If the device's Open Firmware code is not in a PCI option ROM, then it is in the ROM of the Mac. What version of Open Firmware does the Mac have? I have a few ROMs with the ATY,RageM7 fcode, but not the one that has revision 113-XXXXX-119. Use "get-new-world-rom.command" to capture a copy of...
  4. J

    How does the L2 cache work on NuBus (PowerPC)

    Finished updating my ROM Fiend stuff at #24 Attached the result for the 5200/6200 ROM.
  5. J

    unirom: an Old World ROM info dumper

    I added Universal Tables parsing to the ROM Fiend template for Hex Fiend.app. #24 I believe every ROM with a Universal Table is supported. It handles some differences between newer and older versions but not all differences. For example, the ProductInfo record can be 64, 72, 88...
  6. J

    ROM Fiend: A DeclROM, Extended DeclROM, and System ROM parser

    I've created forks for these: https://github.com/joevt/68k-mac-rom-maps Add more ROM Maps (including some for PowerPC Macs). https://github.com/joevt/rom_fiend Map more ROMs to existing and new ROM Maps. Use ROM Map to label pointers and offsets. Parse ForeignOS. Parse Dispatch Tables...
  7. J

    Testers Needed: Modified ROM for LC475/Q605

    Too bad SIZEMEMORYPATCH is not in the supermario git repository. I think MAME can emulate a Macintosh Quadra 650? I would try that to see if the ROM supports the RAM configuration that you want to try. Make sure the emulator chooses the same ProductInfo as your Mac. It looks like each bank can...
  8. J

    Powerbook 540c Resurrection

    The 190 ROM is later than 520/540. I think it contain Universal Tables for 520/540 but some info has changed. I'm not sure which ProductInfo corresponds to the 190 and which to the 520/540. A dump of the CPU ID register and the lowmem globals using MacsBug or whatever will show which...
  9. J

    Powerbook 540c Resurrection

    That $02ff ffff matches the 0x3000000 in the Universal Tables in the ROM. 0A7A60 RamInfoPtr -> RamBankInfo offset -> 0xA892C 0A892C MinBankSize 0x200000 0A8930 HighBankStart 0x0 0A8934 HighBankEnd 0x800000 0A8938 NextBankStart 0x800000 0A893C...
  10. J

    Powerbook 540c Resurrection

    Is "it" the subject of this thread - the PowerBook 540c? Oh wait, the top of the display in the photo says "PowerBook 520c". The Universal Tables seem to suggest that RAM could be up to 48 MB? 6 banks of 8 MB - assuming the following: The ROM is "1994-05 - B6909089 - PowerBook 520 520c 540...
  11. J

    NanoMac, a candy bar sized FPGA Mac Plus / PlusToo

    A program can enable external clock, enable loopback, begin automatic transmission, and count the number of bytes received in a certain amount of time to determine if the external clock is working. https://68kmla.org/bb/index.php?threads/localtalk-but-faster.45615/post-505309...
  12. J

    PM6500 and Upgrading to 9.2.2

    Use the diskutil command to erase the partition as HFS?
  13. J

    Benchmark confusion

    A more readable version of the Technical Note TN1008 "Understanding PCI Bus Performance" exists in the PCI Driver Development Kit 2.0
  14. J

    Benchmark confusion

    What was the Sonnet SATA card? https://www.sonnettech.com/product/legacyproducts/tempo_serial_ata.html Using 40 or 80 conductor cables for ATA? 8600 has 50 MHz bus? Measuring MiB or MB/s? What SD card? What SD card adapter? What SSD? What ATA adapter? How fast was the built-in SCSI? < 10 MB/s...
  15. J

    Yes, on my B&W G3 and DingusPPC (B&W G3, iMac). That image appears after a boot file has been...

    Yes, on my B&W G3 and DingusPPC (B&W G3, iMac). That image appears after a boot file has been chosen automatically. It's just showing what is booting (device path, partition number, file path, file type, icon). The icon image is in the CHRP boot script in the data fork of the "Mac OS ROM" file...
  16. J

    SE/30 not recognizing internal floppy or any SCSI (internal & external/BlueSCSI)

    What does "ADB'ed the floppy" mean?
  17. J

    How does the L2 cache work on NuBus (PowerPC)

    Your output shows that only having the ROM is not sufficient to determine how to emulate a machine. The ROM has many ProductInfo's that are not Power Mac 5200 so we don't know which ProductInfo is for the Power Mac 5200. Even if we knew the CPU ID was 0x2258, we can't tell from the ROM that it...
  18. J

    How does the L2 cache work on NuBus (PowerPC)

    I've sorted your output and removed duplicate DecoderInfo lines: 0x00000D00,2,TimeDBRA,0x1A97 0x00000D02,2,TimeSCCDB,0x0507 0x00000D04,4,SlotQDT,0x0000DDA0 0x00000D08,4,SlotPrTbl,0xFFFFFFFF 0x00000D0C,4,SlotVBLQ,0xFFFFFFFF 0x00000D10,4,ScrnVBLPtr,0x0000DE22 0x00000D14,4,SlotTICKS,0xFFFFFFFF...
  19. J

    How does the L2 cache work on NuBus (PowerPC)

    NKHWInfo.ADB_Base and NKHWInfo.SCSI_DMA_Base appear to be incorrect. They appear to be a copy of the CPU ID from 0x5FFFFFFC. Can you read the bytes at 0x5FFFFFFC to verify? CPU ID 0x2258 is strange - I would expect PowerPC Macs to use cpuIDRISC=3 instead of cpuIDHiEnd=2? I am creating a ROM...
  20. J

    How does the L2 cache work on NuBus (PowerPC)

    I guess the first thing to get would be the CPU ID at 0x5FFFFFFC There's a list of CPU IDs at https://bitsavers.org/pdf/apple/mac/mess/Mac_Technical_Notes.html but it does not include the CPU ID for the 5200. You can use MacsBug to read it. You might need to read it one byte at a time. #12
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