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Unknown symbols on Mac IIci Bomarc schematics

geokov

Active member
Hello all,

There are some symbols on the Mac IIci Bomarc schematics that I need help with. In the image, this is part of the UD11 chip on the IIci Bomarc schematics. I have looked online for the answers but have not have luck finding the answers yet.

1. What does the line over ARST mean?
2. What is the symbol between the R and the W that continues over the W?
3. What does the circle with the line through it mean?
4. What does an asterisk after a pin or net name mean?

Thanks :)
 

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Phipli

Well-known member
Hello all,

There are some symbols on the Mac IIci Bomarc schematics that I need help with. In the image, this is part of the UD11 chip on the IIci Bomarc schematics. I have looked online for the answers but have not have luck finding the answers yet.

1. What does the line over ARST mean?
2. What is the symbol between the R and the W that continues over the W?
3. What does the circle with the line through it mean?
4. What does an asterisk after a pin or net name mean?

Thanks :)
1. The line means "NOT", it is a boolean invert
2/ It is a forward slash and a "NOT" over the W, they've just become merged.
3 . A circle with a line through it can mean a few things, but I suspect here is means "Clock 2"
4. Where? Do you have an example?
 

cheesestraws

Well-known member
1. What does the line over ARST mean?

It means that that signal is active-low: that is to say, it is "true" when it is low. This is how you can understand your second point:

2. What is the symbol between the R and the W that continues over the W?

It's just a slash, with a line over the W. So, it's two signals in one - it's R (active high) and W (active low) - so when it's high it's a read and when it's low it's a write.

3. What does the circle with the line through it mean?

It's a badly-written Greek letter Phi (φ). This is what the VIA calls the clock that deals with transfers between it and the CPU. The datasheet says:

"3.8 Phase 2 Internal Clock (PHI2)
The system PHI2 Input Clock controls all data transfers between the W65C22 and the microprocessor."

φ is often used as an abbreviation for "phase" which is why I think it's being used here?

edit: sorry, @Phipli, didn't see our posts had crossed. Or should I say φpli? φπλη? :D
 

geokov

Active member
1. The line means "NOT", it is a boolean invert
2/ It is a forward slash and a "NOT" over the W, they've just become merged.
3 . A circle with a line through it can mean a few things, but I suspect here is means "Clock 2"
4. Where? Do you have an example?
Hi Philipi, thank you for the fast reply and very helpful answers. In the attached image of the same chip, there is an asterisk after some of the net names, for example "RESET*on pin 37. The circle with the line through it from the Bomarc on pin 27 is now a little wedge.
 

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Phipli

Well-known member
Hi Philipi, thank you for the fast reply and very helpful answers. In the attached image of the same chip, there is an asterisk after some of the net names, for example "RESET*on pin 37. The circle with the line through it from the Bomarc on pin 27 is now a little wedge.
It is a second way of writing "NOT" (or active low as @cheesestraws said - same difference depending on how you're used to dealing with it - I learnt it in maths classes first).

edit: sorry, @Phipli, didn't see our posts had crossed. Or should I say φpli? φπλη?
I'm just amused that we both answered the same 3/4, but gave completely different mutually correct answers. Then didn't answer 4.
 

cheesestraws

Well-known member
there is an asterisk after some of the net names

The asterisk is the same thing as the line above, just written in a different style. It means 'active low'.

The circle with the line through it from the Bomarc on pin 27 is now a little wedge.

The Phi is still there next to the wedge: it's the thing that looks like a mangled zero before the 2 next to the wedge. The wedge means it's a clock.
 

bigmessowires

Well-known member
Those Bomarc schematics occasionally have conventions that I don't understand, or maybe they're mistakes. This one is also from the IIci schematic:

schematic-symbol.png
What is the circled section trying to communicate? Something like: this trace is surrounded by GND? The same convention is used again near the bottom of the same sheet.
 

Phipli

Well-known member
Those Bomarc schematics occasionally have conventions that I don't understand, or maybe they're mistakes. This one is also from the IIci schematic:

View attachment 67735
What is the circled section trying to communicate? Something like: this trace is surrounded by GND? The same convention is used again near the bottom of the same sheet.
That is fencing. It is for stopping the trace from influencing other traces. It is often done alongside clock traces to stop them coupling with other traces. The fences are tied to gnd and act like shielding in a cable. The symbology is fairly standard.
 

bigmessowires

Well-known member
Interesting, I've never seen that symbology before. I guess it's more of a layout hint than schematic information.
 

Phipli

Well-known member
That is fencing. It is for stopping the trace from influencing other traces. It is often done alongside clock traces to stop them coupling with other traces. The fences are tied to gnd and act like shielding in a cable. The symbology is fairly standard.
If it wasn't on the schematic, someone looking at the board would be wondering what the traces alongside were.
 

geokov

Active member
Those Bomarc schematics occasionally have conventions that I don't understand, or maybe they're mistakes. This one is also from the IIci schematic:

View attachment 67735
What is the circled section trying to communicate? Something like: this trace is surrounded by GND? The same convention is used again near the bottom of the same sheet.
Thanks for asking about that symbol, I would have had to ask about that one too when I came across it.
 

geokov

Active member
It means that that signal is active-low: that is to say, it is "true" when it is low. This is how you can understand your second point:



It's just a slash, with a line over the W. So, it's two signals in one - it's R (active high) and W (active low) - so when it's high it's a read and when it's low it's a write.



It's a badly-written Greek letter Phi (φ). This is what the VIA calls the clock that deals with transfers between it and the CPU. The datasheet says:

"3.8 Phase 2 Internal Clock (PHI2)
The system PHI2 Input Clock controls all data transfers between the W65C22 and the microprocessor."

φ is often used as an abbreviation for "phase" which is why I think it's being used here?

edit: sorry, @Phipli, didn't see our posts had crossed. Or should I say φpli? φπλη? :D
Thank you cheesestraws, between your and Phipli's answers, I've got it now. :)
 

geokov

Active member
It is a second way of writing "NOT" (or active low as @cheesestraws said - same difference depending on how you're used to dealing with it - I learnt it in maths classes first).


I'm just amused that we both answered the same 3/4, but gave completely different mutually correct answers. Then didn't answer 4.
Thanks for taking the time to help out, I really appreciate it. :)
 
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