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It's probably not impossible to figure out how to populate the board, it doesn't look like it strays too far from Apple's official dual 7400/7410 cards of that period, though I'm not sure if the CPU connector is still available. If you look at pictures of the Apple 820-1053-A card, it seems...

FWIW, I've had C136 explode on a couple boards (not sure if it's the same component number on the other LCs, but the equivalent cap anyway) now when fitted with tantalum caps. It's driving me away from them too.

There is a model available for a trayloader bezel that's pretty good, might save you some work :-) https://www.myminifactory.com/object/3d-print-bezels-for-macintosh-quadra-800-840av-powermac-8100-8500-9500-80291

Is your 7400 die square shaped, or rectangular shaped? I think the one I've got as described above, is the rectangular die. The die shape changed due to a die shrink, hence the shape change. The older 7400s can't overclock as much as those.

Setting it to 1.8V is likely to help with stability. I didn't notice much instability on my machine, which runs the 466MHz 7400 at 500MHz @1.8V on the 83MHz FSB, with the 1MB cache at 250MHz through MCP.

The MPCPCMEC.pdf mentions that the cache setup can either be done through an SPD EEPROM like on the iMac G3, or through simple pull up and pull down resistor straps. The PowerMac G3 uses the latter.

Looking at the dump of the MAChSpeed SPD ROM, offset $12 is set to 0x96, which does translate to 150 in UInt8 (and (U)Int16), so there might be things going on in that SPD to allow higher speeds. The question would still remain why MCP is necessary to actually achieve the speeds and see the full...

I know @dosdude1 at one point tried editing the SPD data for the iMac G3 Trayloader as well, but also ended up settling for the Wallstreet SPD data, which also resulted in a 3:1 ratio (133MHz L2, 400MHz CPU on 66MHz bus). I too believe the attempts at editing data just caused the machine to no...

Don't pin me down on it, but I recall it being the ST 24C02 (2 kilobit/256 byte) serial EEPROM. If it's marked as "402W" or something like that, that would confirm it.

The SPD EEPROM data of the PowerMac G4 cards is quite different from that of the iMac G3 cards. Using it just results in no cache detected. I'm still not sure what the XLR8 SPD data changes, but it is enough for the MAChSpeed Control Panel to be able to actually enable the extra cache.

Unfortunately, HR Diemen stopped producing the replacement flyback transformers a while ago, and places like Dönberg Electronics and Electronica USA have since depleted their stock. Same for the Trayloaders, I stocked up on those while they still had them for that reason, but I too don't have...

Not sure, I don't think there are more schematics available that would reveal that info, and the PowerBook cards don't have codenames on them. The iMac cards do, though as "HV-Lite", which makes me curious what the difference is with a non-lite card, which don't seem to have made it to production.

They are, but I'm not certain they'd work 100% the same with identical ROM code, if they do need support from the ROM.

That's the main chipset, which also handles the PCI bus. The Heathrow and Paddington I/O ASICs sit on that PCI bus, and handle everything from the IDE interface, floppy interface, Ethernet, etc. I'm not 100% certain, but if they need code in the ROM for the system to be able to use these ASICs...

The best way would probably be to figure out a method to flash the iMac ROM onto the Wallstreet card, inside of a PowerBook G3 WS. Apple's flashing utilities will have methods of verifying whether the ROM is valid for the machine, so those would have to be patched out or otherwise overruled. I...

Yep, and they all have Apple part numbers as far as I know, meaning it'll be hard to tell if there are off the shelve programmable ROMs that could fit in their place, and if these follow any sort of standard that ROM programmers can handle with regards to reading and programming them.

It is something I've been curious about myself. The thing is, the iMac G3 schematics do actually reference the Wallstreet card, naming it "SUV (WS)" in a voltage setting comparison chart with Columbus' (the codename of a hardware design for a scrapped netbooting client, repurposed for the...

I didn't take notes and it's been quite a while, but I tried quite a few different combinations and never got past 87MHz. That said, I still don't fully understand the two resistor settings nearby the clock generator, and its effect on the bus PLL resistors.

Should work fine, the 7400 supports 3.3V L2 cache which I think this card uses. The 7410 is what you can't use in that case, as while it'll actually work, it'll be L2 cacheless as this cooks the L2 controller in the die.