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The speed of chips will not change the performance of the memory subsystem. The IIsi uses synchronous cycle, the timings are based on the CPU clock, not the speed on the chips. The number of cycles required is hardwired in the memory controller (or could be configurable via a hardware register...

OK, thank you! So I have the 'right' one, provided the 20 MHz clock of the IIsi doesn't cause issue. IIRC, you tested in a IIfx as well? That should also default to a 20 MHz clock, so odds are good, if I didn't mess up something else. I did manage to run WinCUPL under Wine (GUI doesn't look...

Dumb question - what's the speed grade of the ATF1502AS on those board? That's the one number I didn't double-check before ordering my variant, and now I'm worried I made a stupid assumption. The schematics mentions a -25 [AU44], but that could just be the for the schematics/footprint, where the...

Thank you, that explain a bit. Memory map limits 60000 PDS (SE slot) to one and NuBus slots to 6, while available interrupts on the connector limits the SE/30 and IIsi expansion to 3 slots. So 4 (or even more so 8) slots feels a bit weird. Not impossible in theory, but that would require a lot...

Paid €3.27 for 300 (allegedly, didn't count them...) on AliExpress. But yes, preci-dip is likely a better/easier option for 'standard' sockets - IMHO the interest lie more in things like the 'V' version of the 68040 in PGA package, whose socket is not listed in preci-dip's list of pin patterns.

You could always make your own :-) Also, Preci-Dip 510-87-128-13-041101 is in stock at Mouser (France) and much less expensive than the Mill-Max. I haven't tried one, but the 510-83-068-10-061101 was fine for the '881/'882 in my PDS adapter.

Yes, and it's quite frustrating. This particular manufacturer in Germany (aisler.net) used to have a service where they shipped parts along the PCB, but not assembled; for through-hole, it was convenient to avoids shipping costs on €2 worth of components. I did my MAC/VGA adapter and the custom...

A simple PDS adapter with 2 slots for the IIci, so just 8 lines in the BoM for SMT (two for resistors, four for capacitors, small switch & a single 1G3157 IC switch). JLCPCB breakdown for 5 boards: Merchandise Total $48.87 Shipping $20.22 Customs duties & taxes $13.82 Grand Total: $82.91...

Those are the correct files, but the pick'n'place file only has the surface mounted components. The two plugs for power (J1, J2) and the switch (U1) I got separately and soldered by hand (they are listed in the BoM) - they hare through-holes. J2 is on the bottom side and by default JLCPCB only...

Turns out, space is really constrained - that 5V plug wouldn't fit, and I'm not sure an ethernet would would on the other side... so as not much power is needed, go for a micro-usb instead of the bulky plug, and rotate the Ethernet 90° so the cable has space inside the machine. @halkyardo Are...

I wouldn't expect a video device to need 12V, very surprised it did for such a critical function... so it works now in the IIsi?

The IIsi power supply and internal circuitry isn't great, so my suggestion it to check the voltage on the 5V rail in all three cases (no video and both video device). I would expect the Mac to go into self-reset rather than just hang, but it's an easy check so worth doing. Ideally you want at...

I don't think the chips can do more than 1 MiB out-of-the-box as they don't have the necessary inputs. It might be possible to add external logic to support larger sizes, but then timings would become a major issue. 1MiB might be feasible, but I don't know of a reference design, and assembling...

Yes, the devnote for the 520 says it's the same. Page 30:

After I posted that, I found some AliExpress vendor claiming they were selling the 66 MHz version for about $17 each. Between the unreliability of such claims, and the fact it would require being shipped to e.g. JLCPCB somehow for assembly (or be handled by someone able to solder BGA at 'home')...

In theory, there's an alternate solution to the many chips implementation mentioned previously, but this would require a much larger budget... Motorola did produce an integrated 256 KiB L2 cache for the 60x bus, the MPC2605. You can use 1, 2 or 4 of them to produce a 256 KiB, 512 KiB, or 1 MiB...

OK thanks! I started from scratch in KiCad 5.1, where my PDS adapter was, so I redid the schematics there - still need to double-check them thouroughly... The footprints are also from from scratch, I'll also have to double-check but that should be OK, and JLCPCB's 2D/3D view provides a "final...

I see that you have betas on the way, do you consider the GitHub schematics "final"? As mentioned, I'm considering a much smaller form factor that could fit with a IIsiFPGA on a custom dual-PDS adapter (or stand-alone!). Current WiP looks like this: The 5V plug on the left is to power up the...

It is a nice CPU, and yes it's likely somewhat crippled by small caches - as most CPU would be, the L1 cache size being limited by area (almost any CPU without built-in L2) or by meeting L1 access latency requirements (almost everything since the introduction of the built-in L2). The 64-bits...

The MC88200 aren't CPUs, they are Cache/Memory Management Units for the MC88100 (the first implementation of the MC88000 architecture). The MC88100 doesn't have internal caches or MMU, aid it has two external 32-bits memory bus ("P-Bus"): one for instruction, one for data. Unifying that into a...