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Reverse Engineering the Macintosh SE PCB & Custom Chips for 1:1 reproduction


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Well those 3 chip modules are 2 actual RAM and 1 is the 1-bit Parity RAM chip, which isn't used on macs (except TEMPEST and DoJ/DoD specific purchased Macs). It's more a limit of the BBU - not enough pins for outputting all the RAM address lines. Plus in 1987 - 4MB was considered a flight of fancy for most, so it wasn't really a concern. Like i mentioned earlier - it may be possible for whatever BBU replacement to address the additional lines, using extra pins on whatever PCB fits in there, and it'd be trivial to add the connection on the Logic board side of things. 

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I think we're far enough in, by now - that it's about time i posted the Sprint Layout file and the high resolution scans used for Sprint, for all and sundry. This is the current 1.4d revision, with the fixed A5 line - IT IS NOT GUARANTEED TO WORK (not yet!), and if the board is fine, and it's verified working, then i'll post that revision (if one is needed). 

 

This is, after all, an open-source, community driven project, done for the good of the community. 

When this project produces working boards - i'll still sell them - probably for around £20 to £25 per PCB, to anyone that wants one, but feel free to make Gerbers of your own, modify the design to your hearts content...but please leave the silkscreen credits alone, is all i ask :)

 

Macintosh SE Project.zip

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@maceffects It's also useful to reflect upon Brainstorm's historic business model, which was to first reverse engineer the Macintosh Plus PALs and then use that knowledge to create the Macintosh SE BBU replacement.  I'd reckon that method on its own must have created pretty good results.  As far as reverse engineering the Brainstorm is concerned, most of our efforts should really just be focused on analysing the software of the embedded 68k processor on the PDS.  I'd guess the Brainstrom BBU is not an FPGA and has no firmware of its own and the firmware upgrade only goes toward the embedded 68k processor, but maybe it is actually used as a loader for the BBU that's just an FPGA.

 

Well, either way, my two cents, there's nothing interesting to see by destructive reverse engineering of the Brainstorm BBU directly.

Edited by quorten
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7 hours ago, quorten said:

@maceffects It's also useful to reflect upon Brainstorm's historic business model, which was to first reverse engineer the Macintosh Plus PALs and then use that knowledge to create the Macintosh SE BBU replacement.  I'd reckon that method on its own must have created pretty good results.  As far as reverse engineering the Brainstorm is concerned, most of our efforts should really just be focused on analysing the software of the embedded 68k processor on the PDS.  I'd guess the Brainstrom BBU is not an FPGA and has no firmware of its own and the firmware upgrade only goes toward the embedded 68k processor, but maybe it is actually used as a loader for the BBU that's just an FPGA.

 

Well, either way, my two cents, there's nothing interesting to see by destructive reverse engineering of the Brainstorm BBU directly.


Technically the board/chip could be X-Ray'd... There is also tracing software these days that help trace the board lines out & identify ICs...

These older machines are mostly all 2-layer PCB designs & the PDS slot is a dream as it provides direct access to the Data bus lines....

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17 hours ago, SlickClick said:


Actually on Paper the 68000 supports up to 16Mb of RAM... 
I suspect because of the limited amount of Bus Lines to/from the SIMM Slots is the Limiting Factor for the Base Model SE; that and that the ROM would need Modification to Recognize/Access Limits Higher than 4Mb...

IDK; but it is possible that there is a Physical Hardware Block or Value/Signal sent/set to the CPU; for instance the difference in cutting the resistor to allow for 1Mb SIMMs over 256k SIMMs...

I suspect that it might be possible to make some RAM chips that would Max out the RAM abilities of the CPU... Technically you can make Half Meg (512k) chips too... For Instance a 1.5Mb SIMM might be a fair starting place since you have a 3-Chip module setup; so if you put 3-512k RAM chips on it, it might not be too much additional memory range to utilize... 

I have a feeling that with a properly designed SIMM a 2Mb SIMM could be made/used; possibly even a 3Mb SIMM which since you have 3-chip modules slap on 3-1Meg chips and see what happens...

I believe that 12Mb is Obtainable...

 

The problem is where they positioned the ROM on the SE. everything from the beginning of address space up to the ROM is all open territory for RAM. and it stops at ROM. 

 

Sure theres a gap of space after the ROM, but ive read online that the OS doesnt like anything past the ROM as being RAM, it has to be continuous, with the exception of using OS patches or some RAM overlay software or something. 

 

The macintosh portable is also a 68000, but it can go up to 9MB of RAM, because they positioned the ROM further in address space.

 

Also, no... it does NOT support 16mb of RAM. its 16MB of "Address space" which includes EVERYTHING, including but not limited to, RAM, ROM, I/O space, peripherals, and other hardware memory-mapped bits necessary for the base machine to work, as well as expansion space.  

Edited by techknight
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@quorten Sorry about my meandering mind.  You see, I am not proficient in the skills to do much more than offer manual labor, funds, other knowledge, et cetera.  Sometimes my passion and enthusiasm to pursue things gets in the way of reality.  Anyway, I've been probing China to see if any chips are leftover.  Some places (like shown below) claim they do, but don't.  Its a marketing ploy to get you to ask about other chips to buy from these vendors.  I have a friend on the ground in Shenzhen though, so if they exist there we will find them.

 

@techknight Yeah, that's true the overall address space is chopped up.  Do you suppose with some modifications to the ROM/other chips we can at least yield 8mb?  Just curious, I certainly lack the skills needed to do it, so just interested in theoretical possibilities. 
 

IMG_0216.jpeg

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No problem @maceffects, probably better that your meandering mind touches some points before other's do.  Good to have the discussion, as long as we do not feel things are getting too chatty/cluttered here.

 

Almost anything is possible with bank switching.  The main limit is really what can be done with unmodified versions of Mac OS and the "user-mode" software developed for it.

 

But, the bigger point, sometimes "one more feature" here is really asking for an SE/30.  We'll get there.  :)

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10 hours ago, maceffects said:

 

@techknight Yeah, that's true the overall address space is chopped up.  Do you suppose with some modifications to the ROM/other chips we can at least yield 8mb?  Just curious, I certainly lack the skills needed to do it, so just interested in theoretical possibilities. 

 

Jumping in there but you need to modify at leat :

- Chip selects (BMUs/BBUs/CAS*)

- SCSI is in the low range too (Around 5 MB)

- ROM

- ASICs (the internal video card and sound card comes to mind)

 

I'm not sure if the SCSI Manager for example would work with a "non-standard" offset. It would be easier to put a Macintosh Portable motherboard inside an SE case :/ 

Edited by demik
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On 1/6/2021 at 6:10 AM, techknight said:

 

The problem is where they positioned the ROM on the SE. everything from the beginning of address space up to the ROM is all open territory for RAM. and it stops at ROM. 

 

Sure theres a gap of space after the ROM, but ive read online that the OS doesnt like anything past the ROM as being RAM, it has to be continuous, with the exception of using OS patches or some RAM overlay software or something. 

 

The macintosh portable is also a 68000, but it can go up to 9MB of RAM, because they positioned the ROM further in address space.

 

Also, no... it does NOT support 16mb of RAM. its 16MB of "Address space" which includes EVERYTHING, including but not limited to, RAM, ROM, I/O space, peripherals, and other hardware memory-mapped bits necessary for the base machine to work, as well as expansion space.  


Hence the last line of my post: "I believe that 12Mb is Obtainable..."
I get all that you mention; doesn't negate from the fact that the CPU is capable of addressing 16Mb of RAM/ROM... 
Again on paper the CPU is Capable and I stick by my statement that 12Mb could be obtainable... Aside other physical limitations in an unmodified base SE... We already know that the data lines arent there to do what we'd like...

So the question is what is the Hack/Work-Around to push the limits of the stock RAM slots..?

I saw some 30-pin SIMMDoubler card on the net in a Mac parts blog... The Card allows you to put Two 30-pin (1Mb, 2Mb, or 4Mb) SIMMs into one slot...
I read somewhere that another ROM can be swapped into the SE to utilize a later co-processor (maybe a II-series ROM?); the code of those ROMs is key...
I havent looked very much on various dumped system ROMs either at this point...

I did just pay for a MicroMac SE Accelerator Card; so next week when it arrives, I'll post up some pics..!

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4 hours ago, SlickClick said:


Hence the last line of my post: "I believe that 12Mb is Obtainable..."
I get all that you mention; doesn't negate from the fact that the CPU is capable of addressing 16Mb of RAM/ROM... 
Again on paper the CPU is Capable and I stick by my statement that 12Mb could be obtainable... Aside other physical limitations in an unmodified base SE... We already know that the data lines arent there to do what we'd like...

 

And this is where my insight/support/contributions end. 

 

Wish you all the best. 

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6 hours ago, Kai Robinson said:

Yes, let's get back on track with the SE board, please :)

So - to those who downloaded the board files - can you open them OK?


I can see the files in the Zip; but they error when trying to unzip or access in Win10...
Where is a safe link to DL Sprint Layout to open the LAY6 file..?
I been tinker in PCB Artist...

Edited by SlickClick
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3 hours ago, Kai Robinson said:

It was zipped with 7Zip. 

https://www.electronic-software-shop.com/lng/en/electronic-software/sprint-layout-60.html?language=en is the official site for Sprint Layout - there's a demo version on the site, too. 


Got it to open w/ 7zip and DL'd the lay6 Viewer...
Going to take a while to compare...
-Is this off a Rev.A, B, or C SE Board..?-
Edit: Looks like yours is Rev.A; I only have Rev.B boards to compare...

Edited by SlickClick
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2 hours ago, Kai Robinson said:

No, not tried yet - still trying to get going with the base board. 


Do you have Undoctored Photos of Both Sides of the Bare Board..?
Im noticing some odd overlays when trying to lay in the Ground Trace in the 2 images in the Zip file...

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I dont see 4-Layers on the file... I see Blue Layer as Top Layer Traces, Green Layer as Bottom Layer Traces; where are the other 1 or 2 Layers of the PCB..?
ie the Ground Circuit Layer Mapped out..?
The Red Layer is Components, Text, & Ground Circuity (3rd Layer)..?
Just trying to figure out what is what since everything is all one color or another in this file... Just going to keep tracing out the JPEG in Photoshop for now then... 

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This shows the layer order. 

 

C1 = Copper Layer, TOP

S1 = Silkscreen Layer, TOP

I1 = Ground Plane

I2 = VCC Plane

C2 = Copper Layer, BOTTOM

S2 - Silkscreen Layer, BOTTOM

 

Bold highlighted are copper layers so for the 4 layer board the order is C1, I1, I2, C2

Screenshot 2021-01-08 225508.jpg

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2 hours ago, Kai Robinson said:

This shows the layer order. 

 

C1 = Copper Layer, TOP

S1 = Silkscreen Layer, TOP

I1 = Ground Plane

I2 = VCC Plane

C2 = Copper Layer, BOTTOM

S2 - Silkscreen Layer, BOTTOM

 

Bold highlighted are copper layers so for the 4 layer board the order is C1, I1, I2, C2

Screenshot 2021-01-08 225508.jpg


I didnt notice the active layers position thingy... Never used this app before... And Im only using the Viewer; not the full or demo, so its very limited...

Edited by SlickClick
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