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Mac SE/SE/30 Ethernet Card Recreation

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All I know is the address has to be rejiggered on the LC card so it works on the SE/30 PDS. 

 

The card's PALs think its decoding in slot "E" but the system sees it as otherwise because of a couple switched address lines. 

 

thats all Im sayin. 

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I've started buzzing the address jumper setup on the Pivot II/IIsi to find out where the lines go to see if we can figure out what they do. Here's a link to a paper describing the address decoding you've been talking about on a DIO card designed for the LC:  Data Acquisition System for Macintosh. I've had a copy in the LC floder with only the Service Source forever, still haven't found the infamous missing LC DevNote. Does anyone have that one? Might it be on a developer CD?

 

Very curious now about the possibilities of dumbing a 68020 PDS LC NIC down to the SE's 68000 PDS level.

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YEP! Academics! :lol: One thing I took away from it was that one of the chips involved was a transceiver with a select line. WAG would be that the PAL(?) that's activating that line is hooked up as SLOT $E by default, but might be addressable as any of several Slot IDs by yanking on some other lines in its current form or replaced by one that's programmed with formulas to produce the three ID variable results we're suggesting?

 

LC 020 PDS NICs  post date SE/30 030 PDS developments by 21 mos. given introduction dates. I figure it's reasonable that LC NICs might be 020 compatible subsets of existing SE/30 NICs. Why emasculate a time tested, shipping design unnecessarily by changing PAL parts or formulas? The decoding setup for the more capable SE/30 030 NIC could work just fine inan 020 function subset environment. If necessary at all, a Slot ID tweak might be trivial given the product timeline scenario?

 

All WAGS BTW. :blink:

Edited by Trash80toHP_Mini

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How would I go about detecting what addressing mode the SE/30 is in from monitoring the address lines?

Ready to wire up something on my breadboard and have a GAL invert address lines 26 or 22 depending on which mode the SE/30 is operating to shift the card to slot $A

Interrupt is going to be wired to /IRQ2.

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True, but its something to think about especially when it comes to the card and how it handles the addressing. 

 

Honestly I never thought about it. 

 

Biggest reason I am following how and where this thread goes is I want to make my own peripheral cards eventually. 

 

Would be nice to have an accelerator card with an ARM processor on-board that brings ethernet, wifi, USB, etc expandability to the Mac as well as a Webkit or Gecko rendering engine on-board to assist in browsing the web with ease. 

Edited by techknight

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Sort of but I dont think the ARM can manipulate the bus and decode it fast enough, probably have to shoehorn some buffer memory and an FPGA in the middle. Not sure though. 

 

Another way to do it is the 030 I think can handle 8, maybe 16 coprocessors. I forget its been awhile since I have looked at the datasheets. 

 

the ARM could emulate a co-processor and execute the 68882 instruction set, on top of a few "extended" instructions that do other things that we write drivers for. ;-)

 

Those instructions would execute at the full speed of the ARM. Cool thing about that, is tune the Retro68k compiler with the "extended" instruction set, make a modern browser and compile it with those instructions, and the browser would actually run comfortable. 

 

But hey, I am way out there at this point. 

Edited by techknight

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The 68030 socket is a lot more conducive to smaller scale protoboarding playtime of this sort than the buffered PDS with its gifrigginnormous 120 pin connector. I've been thinking that wedging an Ethernet card in at the CPU socket level would be best for a ground up build.

 

That brings me to an interesting question. The SE/30 ROM is based on the IIx ROM as is the IIcx ROM. I wonder if they killed support for more than three interrupts at the CPU level in ROM or left it alone? Might they have content with hardware level emasculation, pruning the I/O map back to just three places wired to an interrupt? CPU socket hackery beckons on so many levels. [}:)]

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New one popped up on the eBay radar this morning: https://www.ebay.com/itm/192569736434

 

Looks like a very early NIC with all or almost all standard, discrete components. Looks like a pair of ROMs for a CPU on the PDS card?

 

SE30-Cabletron-NIC-03.jpg.685bd1b25d77bb93a08c5e1473b3ffbd.jpg

 

Another large IC on the that may be a standard part of some kind?

 

SE30-Cabletron-NIC-02.jpg.f4a3be181f525c55085ef27d9759517d.jpg

 

Standard part on the breakout board seems more likely to me, but that's a WAG. Discrete GAL/PAL DIP ICs (labeled) on the PDS card might be individually brute forced?

 

Dunno, all guesswork on my part, but this one looks like it might be fully reverse engineered whereas later boards with VLSI ASICs on board are impossible to fathom. Tall order to acheive that goal, but having a fully documented reference design with existing (available?) drivers would seem to be the holy grail for this project.

 

Just sayin'  .  .  .  :blink:

Edited by Trash80toHP_Mini
oopsies

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With the help of my friend Mark from work, who has done the board design & layout, I've started work on a modern replacement 030 PDS Ethernet card based on the Microchip LAN9218. I'm working on writing the driver. There is already a LAN92xx-series driver in the Linux kernel, so we've got something to work with.

 

The LAN9218 is designed for integrating with a 32-bit MCU bus, so the board is pretty simple. We've taken the pseudo-slot design route, so there will be a ROM on there with at least a description ROM. I may even be able to shoehorn the driver in there too.

 

We're at the point of getting some prototype boards made. I'll post once we have a few working boards and have made some progress on talking to it from System 7 :-D

 

The one downside is I'm not sure there is any available documentation on writing network drivers for A/UX, so it may be tricky or impossible to get that running with this card, but hopefully System 7.5 with MacTCP & OpenTransport will be possible.

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The BSD docs have some info. Check the mac68k netbsd source/dev history. I know a few people over the years have gotten access to apple ASICS and the like to be able to get wierd things like DSP cores working. Maybe someone knows someone. :)

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Neat!

 

Are you able to/have you thought of integrating some sort of WiFi interface onto this? Make a special slot for the VONETS 300 to sit in, maybe?

 

I might get one of these for... something!

 

c

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I have been considering Wifi, but no designs yet. There are loads of Wifi modules/chipsets, but most have an SPI interface. That requires more advanced logic to interface with the 68k bus, compared to the LAN9218 which basically just needs wired up.

 

Small FPGAs are pretty cheap these days. I'm interested in designing something FPGA-based next that can go into the PDS slot. That could interface with SPI devices, which is also basically what an SD card is.

 

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The LAN9218(i) is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required.

 

10/100! Very, very cool!

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