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Turbo 601 Upgrades: 1MB cache and 120MHZ!
- Thread starter zigzagjoe
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Yep there is a complete powermac ROM onboard on the PPC bus along with the cache. I posted a couple ROM images earlier in the thread. It is different from any shipped ROM for other machines, but it is difficult to determine by how much.
Small update: I thought that I had confirmed @trag's findings that the Turbo 601 didn't like bus speeds in excess of 34mhz or so, but apparently I made a mistake while testing. On re-evaluating, I found that 30mhz was the lower limit (29.5 would not boot - chime and then a sad chime) and 42mhz the upper limit (unable to cool the 601 enough to complete boot).
So this basically means the 4x multiplier is superfluous: you're better off with an increased bus speed as it linearly improves cache performance and also gives slightly better bus synchronization (IO). Depending on how lucky you got with the silicon lottery, 36.66mhz (ish) could be used to get a 110mhz cpu clock and a bit of thermal headroom. With my chip the maximum permissible heatsink temperature is something like 50 deg C at 120mhz, but at 125mhz even low 30s was too much. Given that I suspect 110mhz would probably be fine without the midfan I've rigged up.
So this basically means the 4x multiplier is superfluous: you're better off with an increased bus speed as it linearly improves cache performance and also gives slightly better bus synchronization (IO). Depending on how lucky you got with the silicon lottery, 36.66mhz (ish) could be used to get a 110mhz cpu clock and a bit of thermal headroom. With my chip the maximum permissible heatsink temperature is something like 50 deg C at 120mhz, but at 125mhz even low 30s was too much. Given that I suspect 110mhz would probably be fine without the midfan I've rigged up.
Now you have me wondering why I couldn't get the faster bus speeds to work. But, because the hardware is long gone, and it was 30 years ago, I don't think I"m likely to discover the answer.
I could understand if the 80 MHz chip installed just wouldn't go higher in 3X mode. However, IIRC, I tested bus speeds before the modification and if that memory is accurate, then I also couldn't get the faster bus speeds working in 2X. I was using Output Enabler's product, can't remember the name, but it was a molded socket that fit over the original oscillator and had a socket for the replacement. Perhaps that arrangement didn't provide enough signal integrity? Yet, their product worked on other devices for higher frequencies.
Ah, well, mysteries for the ages.
I could understand if the 80 MHz chip installed just wouldn't go higher in 3X mode. However, IIRC, I tested bus speeds before the modification and if that memory is accurate, then I also couldn't get the faster bus speeds working in 2X. I was using Output Enabler's product, can't remember the name, but it was a molded socket that fit over the original oscillator and had a socket for the replacement. Perhaps that arrangement didn't provide enough signal integrity? Yet, their product worked on other devices for higher frequencies.
Ah, well, mysteries for the ages.
Assuming you did the testing before installing the ICS chip for 100mhz operation, then that one's probably pretty simple: the CPU PLL on the 66mhz cards is rated for 133mhz (601 requires a 2x CPU clock) so it was exactly at specifications at 66(.666) mhz CPU clock, and it seemingly doesn't have the headroom for much else before the output went out of spec. The ICS chip allows up to 245mhz, by comparison. There was a 160mhz rated MC88915 so perhaps one could drop that in and a 40mhz osc to avoid needing to switch the CPU out. I was just feeding the new frequency in with one of my handy-dandy pico clock generators, nothing fancy, so I doubt it was an issue with your test setup.
It does make sense that was the bottleneck; we know the Turbo 040 ASIC used for bus translation can operate at 40mhz+, and seemingly the 601 to 040 bus translation ASIC used on the power macintosh upgrade cards can also deal with ~40 mhz. It'd be surprising if something in the logic was so close to tolerances on the Turbo 601 (being a Turbo 040 glued to a 601 card) resulting in workable frequency range being about +- 2 mhz (about 4 ns difference) - that's not a lot of tolerance to absorb manufacturing variances.
The PPC601 on the card was an 80MHz part. At least, it was marked for 80 MHz.
Maybe I only tested the lower (<33.33 MHz) speeds at 2X and tested the higher speeds only at 3X.
I guess I should go read the article again.
The problem is the second MC88915FN133 at U18 - in the 66mhz (x2) configuration, that's the one generating the various clocks for the CPU, including the 133mhz 2x clock the CPU requires. That means when you increase the clock further the PLL is out of its specifications, so it depends entirely on how much headroom the PLL's design has.The PPC601 on the card was an 80MHz part. At least, it was marked for 80 MHz.
Maybe I only tested the lower (<33.33 MHz) speeds at 2X and tested the higher speeds only at 3X.
I guess I should go read the article again.
Ah, thank you for the clarification. When you wrote "CPU's PLL" in the earlier note, I thought it was a PPC601 internal PLL that only supported 2X multipliers. I should have remembered that the PPC601 doesn't have an onboard PLL.
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