[Development] 4MB 32-bit SRAM for the MicroMac Performer

[Phipli]

How much do you think a pristine Gemini Integra board like yours goes for these days?

That one isn't mine, just the first picture I found on my phone, but they seem to go for about £350. There strangely isn't much difference in price between a good SE upgrade and an excellent one.

Truthfully there isn't really a going rate, it is just hit and miss how much the seller asks. There aren't enough of them about for a standard price.

My SE has the slightly older Total Systems Gemini Ultra on it at the moment because I was able to find a 50MHz variant.

 

[Builder68]

Well, in the meantime, while we all wait for that terribly bored guy to step up and take on the challenge, I will keep pounding my head against the wall to make my homebrew adaptation of the Mercury work! Soon, I will post what I've found about adding extended RAM.

 

[Builder68]

...

 

[Builder68]

I can finally confirm that the fast RAM module for the TS Mercury 030 can work with EDO or FPM 1M x 16-bit CMOS DRAM chips without any issues.

I can also confirm that the schematics kindly shared by Bolle work after applying the corrections I explained in previous posts:

A missing trace between both DSACK1 outputs.

The clock for PLD RU9 has to be CLK_30.

After all, the problem was not signal integrity; it was a hard short I hadn't seen all these months!

My first PCB prototype integrating the fast RAM, ROMINATOR, and SCSI interface is finally working rock solid!

It is the ultimate all-in-one accelerator board, purpose-built for those classic 512Ks that refuse to be forgotten in a basement box.

 

[luRaichu]

Hello, can you please share the KiCad files? Thank you

 

[Builder68]

Hello, can you please share the KiCad files? Thank you

Thanks for the interest!

Since the project is still very much a work in progress, I'm not releasing the raw KiCad files right now. I'm actually about to order a second PCB prototype with a much better form factor to properly test the extended RAM feature with a more robust bus buffering strategy.

Once the project is completely finished and tested, I will be sharing a PDF of the final schematics and the Gerber files for the definitive PCB on my GitHub page.

However, if your main goal is just to grab the DRAM controller logic to try out with your Polyphloisboisterous '030 clone, let me remind you that Bolle has actually already publish the schematics here [link] and the jedec files here [link]. The signal labeling matches his Performer clone schematics (also on his GitHub) 100%.

You just need to make these three specific corrections to get a fully working 32-bit data path 4MB RAM expansion module integrated into your clone:

The clock signal to RU9 must be CLK_30.

Run a new trace connecting U4 / pin 12 to RU9 / pin 12 (RU9 / pin 12 is DSACK1 for fast RAM cycles).

Tie RU1QA / pin 4 together with pins 1, 10, and 13.

It is up to you which type of RAM you would like to use: period-accurate RAM chips (four 30-pin 1MB 70 ns SIMMs) or the ones I've been using (EDO or FPM 1M x 16-bit CMOS 60 ns DRAM chips, with the OE pin always tied to GND).

Hope this helps you get yours up and running! I'll keep the thread updated.

 

[luRaichu]

I'm actually about to order a second PCB prototype with a much better form factor to properly test the extended RAM feature with a more robust bus buffering strategy.

I'll wait until then

 

[JC8080]

My first PCB prototype integrating the fast RAM, ROMINATOR, and SCSI interface is finally working rock solid!

It is the ultimate all-in-one accelerator board, purpose-built for those classic 512Ks that refuse to be forgotten in a basement box.

Thanks for all your hard work on this, this is a very cool project.

 

[Builder68]

Thanks for all your hard work on this, this is a very cool project.

thank you

 

[Trash80toHP_Mini]

Greatly enjoying your detailed travelogue. Here's to a pleasant landing for your journey! It's wonderful to see the Performer cloning project being carried on in such fashion.

Can't tell you how disappointed I was when @Bolle let me know he tried it on my Performer in the cloning process, discovering its timings precluded ever running it at 32MHz. Roll on! "Watching" your progress, I almost never do that.


edit: might having a look at the Radius 16 68020 accelerator with cache for the SE give you any insight? It's the only cloning target I know of at present. The First version was a factory install with the second version being clipped onto the CPU in earlier compacts. I imagine that one wound up in many a 512K? I can take all the pics you want, thinking would be that it's a refined version of the earlier models.

 

[Builder68]

Thanks so much for the kind words and for following along! It’s great to have you watching the progress.

Yes, the original Performer logic simply cannot run on anything other than a clock that is exactly twice the host clock.

The surrogate state machine (U4) logic was custom-tailored for that specific quirk, relying on both clock domains being perfectly synchronous at that 2:1 ratio.

I actually did spend some time writing new logic that would allow for a 32MHz or 33MHz clock by shifting the design to two fully asynchronous clock domains.

The impact on the board's chip count was significant, though. It would forcibly require adding address latched buffers (three 74xx574s) and registered transceivers (two 74xx646s), upgrading the U4 PLD to a 22V10, and adding an entirely new PLD just to act as a synchronizer.

But honestly, adding the core logic wasn't the hard part.

The real roadblock was getting the DRAM controller to work reliably at 32/33MHz. The sheer time and effort required to build a prototype and make all the meticulous timing adjustments to make it work with selectable 1 or 3 wait states just didn't seem worth it in the end.

Regarding your thought on the Radius 16 and the SE: Bolle has actually already reverse-engineered the Vandal Extreme.

In theory, that board could be stripped down to a more basic version (no video, no cache) for an early Mac.

But again, is it really worth the effort? Running a 68030 at 33MHz without a cache would likely only offer a marginal performance improvement over the 16MHz Performer utilizing fast RAM with 0 wait states (well, actually that´s not true. The Performer always add 1 wait state for Fast RAM write cycles).

It's also worth keeping in mind that on an early Mac, a large percentage of CPU cycles are inherently tied up accessing the host bus (video, serial, SCSI) at the synchronized 8 MHz speed. Due to this overhead, my guess is that a 33 MHz 68030 would be heavily bottlenecked, and without a cache, performance would be even more severely choked.

The Vandal Extreme is pretty much the ultimate clone target for the SE, and Bolle has already conquered it!

Of course, it is entirely up to him what he wants to do with all that reverse-engineering work.

I don't mean to suggest by any means what he should do with it; I have immense respect for people like him and ZigZagJoe who put such incredible effort into preserving and cloning many of these legendary accelerator boards.

Thanks again for the support!

 

[Trash80toHP_Mini]

The Vandal Extreme is pretty much the ultimate clone target for the SE, and Bolle has already conquered it!

Vandal Extreme was introduced when? I'm not so much interested in the "best" accelerator for the SE so much as the best clonable accelerator for the SE when released March 2, 1987/produced before the FDHD upgrade in August 1989.

68030 was released sometime (later than March?) in 1987, haven't found the date. Wondering when the first 68030 based accelerator for the SE was released? Did Vandal Extreme pre-date introduction of the SE/30?

It'd be interesting to wander thru the Mail Order House ads to do a timeline of accelerator availability dates.

 

[Trash80toHP_Mini]

Timeline project kickoff, tangent rerouted.

Thread 'Timeline - Macintosh SE Accelerator Release Dates?'

Yesterday at 9:37 PM

Notion for this came up in the fabulous Performer/Cache Development Thread. @Builder68 got off the ground.

Looks like one year after release of the SE, 16MHz 68020 was the top end when it came to Accelerators:








Tired out from too many hours of searching today. Does anyone know when the first 68030 based accelerator was released and it's clock? Wondering if it was before or after the Radius 25MHz 68020 Accelerator was released?

Can't find 030 release date other than 1987, wondering what month for that and when CPUs...

• Trash80toHP_Mini
• Replies: 4
• Forum: Compact Mac