Classic II (early 4-ROM) black screen - RESET held low, no 15.7 MHz clock from EAGLE

[JC8080]

I am trying to troubleshoot a Classic II early four-ROM logic board. I picked the machine up 5 years ago, at that time it would only display a checkerboard screen. It had leaking caps on the logic board, so I replaced all the caps and repaired a couple corroded/broken traces. I also recapped the analog board. No change in behavior, I still only got a checkerboard on boot. I recently took the machine out to work on it again, now it only produces a black screen when powered on.

Current observations:

• Black screen
• No chime
• CRT neck glows
• Solid +5V/+12V/-12V measured at floppy connector
• RESET is held low, no address/data bus activity, and the CPU never appears to leave reset.
• The main oscillator produces 31.33 MHz.
• EAGLE receives main oscillator 31.33 MHz on pin 48, but the 15.7 MHz divided clock signal is currently not present on EAGLE pin 11.
• EGRET oscillator Y1 produces 32.768 kHz.
• EGRET pin 15 (/RESET output) remains low, and pin 23 remains low.

Steps I have taken:

• Removed EGRET, U12, and U15 to clean underneath and inspect for corrosion. No visual damage found. There is one repaired trace between U12 and C13 which has been confirmed good by continuity testing. With EGRET removed, the machine consistently displays the checkerboard pattern and RESET is no longer held low.
• I verified continuity from every EGRET pin to all of its schematic destinations. I have not found any open traces. Note this board has the factory bodge from EGRET pin 23 to EAGLE pin 49, it is in good shape and has continuity.

At this point I'm trying to determine what conditions EGRET requires before it releases RESET and enables EAGLE to generate the 15.7 MHz clock signal. Does anyone have documentation describing the Classic II startup sequence in detail, or experience with a board stuck in this state?

Many thanks to @btb for the redrawn schematic, it has been extremely helpful!