Wow, the proposal actually exists. It's kind of amusing, re: the discussion about page faults in the other thread, that item #1 on the "Additions and Enhancements" list is:
Anyway... Skimming through this the details of the "CPU board" are fascinating. The "video" section of it has a full 128K of RAM (48k of which are used for a single frame buffer), and that new sound generation hardware that leeches off the video cycles (just like the Mac) is integrated with it. Honestly, this architecture pretty much reads like they plopped, in whole, a juiced-up revision of the "little Mac" on top of the Lisa-related bits, with the major difference being that they sped everything up and gave the CPU a fast bus channel where other "stuff" can be hung without being strictly gated by video access timings. This impression is further reinforced by the fact that the CPU board also contains the the IWM, now directly driven, the same serial ports... etc.
(Even more telling, the docs seem to imply that initialization code and "stuff" that has reasons to bypass the MMU can also run directly from the video RAM allocation.)
I guess to put it another way, if we were going to use "Amiga-centric" language to describe this thing it basically comes across as the CPU board essentially being the "Chip RAM" portion of the design, and the "Whopper MMU" is tending the "Fast RAM".
The 68010 has been chosen because it supports instruction restart and fast move loops.
Anyway... Skimming through this the details of the "CPU board" are fascinating. The "video" section of it has a full 128K of RAM (48k of which are used for a single frame buffer), and that new sound generation hardware that leeches off the video cycles (just like the Mac) is integrated with it. Honestly, this architecture pretty much reads like they plopped, in whole, a juiced-up revision of the "little Mac" on top of the Lisa-related bits, with the major difference being that they sped everything up and gave the CPU a fast bus channel where other "stuff" can be hung without being strictly gated by video access timings. This impression is further reinforced by the fact that the CPU board also contains the the IWM, now directly driven, the same serial ports... etc.
(Even more telling, the docs seem to imply that initialization code and "stuff" that has reasons to bypass the MMU can also run directly from the video RAM allocation.)
I guess to put it another way, if we were going to use "Amiga-centric" language to describe this thing it basically comes across as the CPU board essentially being the "Chip RAM" portion of the design, and the "Whopper MMU" is tending the "Fast RAM".