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Apple IIgs ROM 03 system bad error

Verault

Well-known member
I have two ROM 03 Apple IIgs systems that gives error "SYSTEM BAD 06010000" When I run the built in Diagnostics. From what I looked up it seems to be an issue with the built in SERIAL IC on the main board.Is that correct or is the issue something else? IF I disable the modem port in the control panel and add a super serial card will the system work as intended sans the on-board serial components? Would that create a functioning machine?

I have tried SEVERAL brand new Zilog SCC IC's and it still gives the error "SYSTEM BAD 06010000", gone down to many dead ends with this board. I really dont think the SCC is the issue. I have also replaced UC12 and UC13 as well as UB13 and UB14. I have no idea what can still be causing this error. Anyone else have ideas? Could the 3.686400 Crystal at Y2 directly beside the Zilog SCC chip be suspect? Would appreciate the feedback,
 

cruff

Well-known member
Yes, I suspect the crystal could be the cause of that error code. Do you have an oscilloscope handy to see if it is working? Be sure to use a 10x attenuation on the probe.

Commonly a crystal might have capacitors to ground on each leg, but the schematic doesn't show any.
 

Verault

Well-known member
Cruff thats a good start thank you. But as I recall the IIgs board has 2 crystals correct? Which one
?
 

cruff

Well-known member
It is the Y2 crystal. It is the baud rate clock (SYNC.L, RTXCA.L, RTXCB.L), and the PCLK signal (CREF.H from the Mega 2 chip) provides the timing signal for the remainder of the 8530 operation, which includes the read/write of the 8530 internal registers. Thus if PCLK is good but the baud rate clock is not then many of the 8530 accesses via the registers will work but transmit/receive of data will not. I am thinking this causes most of the self test of the 8530 to work, but leads to the 06010000 error code.
 

Verault

Well-known member
Ok Cruff. I checked Y2 (and since I was there Y1) The crystals are working fine. It was certainly a good check.. but thats not it. What else possibly?
 

cruff

Well-known member
The SCC diagnostic test performs a exhaustive test of all the values that can be written to the SCC register 2 (interrupt vector, via channel A only), registers 12 and 13 (the baud rate generator counter registers) and register 15 (the external status/interrupt control register, bits 7, 6, 5, 4, 3 and 1 only). If the value written into the registers do not compare when read back, the SCC test exists with an error. Since these registers are internal to the SCC and (should not) depend on the state of any other external signal to the SCD, I'd check if there is continuity from the SCC's D7-D0 pins to another location on the board where the data lines are used, such as the IWM chip (UE6 on the ROM01 schematic).

Also check that there is continuity between SCC pin 12 (SYNCA.L) and 32 (RTXCB.L) and that when the system is powered up that the same signal is present on these two pins.

Check that you see the signals on the SCC pin 37 (C/D.L), 38 (CE.L), 40 (WR.L) and 41 (RD.L) are being strobed from high to low when the diagnostic test is running and that you see the state of pin 39 (A/B.H) is seen in both high and low states. If any of these are not changing state then there may be a problem with UF9, UE13 or UD14, or possibly the address decoding circuitry.
 

Verault

Well-known member
Just want to make sure the Pinouts are the same using a rom 01 schematic as this is a rom 03 board.
 
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