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264 MB in PowerMac 7100 Hack

trag

Well-known member
I'm not about to embark on this hack, but wanted to post the concept while I was thinking about it.

The only reason the 7100 is limited to 32MB SIMMs is because it runs the upper address lines for the SIMMs through a chip which "steals" them to create RAS lines to support more SIMM sockets.

The result of stealing those upper address lines is that 1) four SIMM sockets are supported instead of two (extra RAS lines) and 2) the maximum Bank size supported on each SIMM (2 banks per SIMM) is 16MB instead of 64MB.

In theory, one should be able to remove that RAS/address translation chip and jumper connections across the pads, so that just two SIMM sockets are active, but they will now support 64 MB per bank, or 128 MB per SIMM. This would raise the capacity to 264 MB.

I haven't looked in several years, but IIRC the chip is question is a 44 pin PLCC or something similar. The 7100 and 8100 have this chip. The 6100 does not. Otherwise the chipsets on the machines are identical,well, except for the lack of a NuBus controller on the 6100.
 

Trash80toHP_Mini

NIGHT STALKER
I'm confused here for a change. :rolleyes: Are you saying 8 x 32MB SIMMs yield 264MB in Radius 81/110 and 8100, but 8 x 64MB SIMMS would yield only half that?

edit: I guess that you might have meant 64MB SIMMs show up as 32MB? That's per LEM though.

If you can hack a 7100 to 264MB, maybe you can hack an 81/110 to twice that if it has that same infernal chip interfering? If so, I've got an extra Radius board for you to test! 😬
 
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Nathan_A

Well-known member
Can confirm, I have 8 recently purchased 64MB SIMMs from MemoryMasters that I planned to use to max out my 7100 and 8100. Unfortunately, they're only seen as 16MB SIMMs each.

I'll try them in my Quadra 650 and ColorClassic II at some point. They also gave my OrangePC 290 fits, but seem to work fine in my Reply DoM for 8100 card.
 

trag

Well-known member
If you can hack a 7100 to 264MB, maybe you can hack an 81/110 to twice that if it has that same infernal chip interfering?

I don't think it's possible. As far as I can tell, the X100 chipset lacks the RAS lines. Now, it's possible there are some more sitting there, not hooked up, but that would be a big exploration/experimentation project.

I'll try them in my Quadra 650

Without Bbraun's ROM hack, they'll be seen as 32MB in the Q650.

Would it matter or not whether composite SIMMs are used?

I don't think it would. It has to do with how much memory is physically addressable.

The 72 pin SIMM specification provides for 12 address pins. They're used twice, once for the Row Address and once for the Column Address, giving 24 total address bits when using a 72 pin SIMM.

24 bits of address yields 2^24 = 16M address space.

The 72 pin SIMM is 4 bytes wide (32 bits) so those 16M addresses, multiplied by 4 bytes per address, gives a capacity of 64MB.

A bank in a 72 pin SIMM can't be larger than 64MB, no matter how one massages the signals, because that is all that is physically addressable.

The PM6100 uses all 12 address lines.

The PM7100 and 8100 only deliver 11 address lines to the SIMM sockets. So the maximum capacity in the 7100 and 8100 is reduced to 1/4 (2 bits => 4X).

The the number of RAS lines control how many total Banks per SIMM are supported.

The 72 pin SIMM has 4 RAS pins. But Apple only delivers 2 RAS lines per socket. So 2 banks per socket.

Here are some notes I took several years ago.

IMG_1507[1].JPG

IMG_1508[1].JPG

IMG_1509[1].JPG

IMG_1510[1].JPG
 

MrFahrenheit

Well-known member
I’ve often wondered how 128MB SIMMs can work in a machine such as the LC475/Q605 with its single socket and 4MB of soldered on RAM. This memory debacle is very interesting for not just the PM7100 but other machines as well which have strange limits.
 

trag

Well-known member
Yes, the Q605 supports the full 12 X 12 addressing and has two RAS lines to support two banks on the SIMM. So one can use a SIMM with two 64MB banks on it, i.e. a 128 MB SIMM.

Now the interesting thing about the Q605 is that I put a 72 pin SIMM doubler in there and had two 128 MB SIMMs working, suggesting that the Q605 actually runs four independent RAS lines to its single SIMM socket. I've never traced the wiring to confirm though.

But it definitely supports 256 + 4.

Of course, you can't close the lid with a SIMM doubler and a pair of 128 MB SIMMs in the thing. :)
 

MrFahrenheit

Well-known member
Yes, the Q605 supports the full 12 X 12 addressing and has two RAS lines to support two banks on the SIMM. So one can use a SIMM with two 64MB banks on it, i.e. a 128 MB SIMM.

Now the interesting thing about the Q605 is that I put a 72 pin SIMM doubler in there and had two 128 MB SIMMs working, suggesting that the Q605 actually runs four independent RAS lines to its single SIMM socket. I've never traced the wiring to confirm though.

But it definitely supports 256 + 4.

Of course, you can't close the lid with a SIMM doubler and a pair of 128 MB SIMMs in the thing. :)

That’s really interesting. I have a feeling, though, the Q605/475 maxes at 256MB total, combined. Just a hunch though.
 

Trash80toHP_Mini

NIGHT STALKER
Do you recall what dr. bob dubbed "the evil RAS line hack" from the 'fritter day? if you jumper lines from the 4MB on board pads the 605/475 will address stupid amounts of RAM?
 

trag

Well-known member
I think stealing the 4MB RAS would allow you to address another 64MB of RAM.

That would suggest that the memory chip on the Q605 has either three or five RAS lines, which seems like a truly odd number. I would have expected four or six.

For these non-7100 discussion items we should look up Bbraun's old thread where he hacked the maximum RAM in the Quadras. He may have already answered all those questions about the memory controllers.
 

olePigeon

Well-known member
None of these tricks would apply to an LC, correct? That one is doomed forever to be 10MBs without a Presto Plus?
 

MrFahrenheit

Well-known member
None of these tricks would apply to an LC, correct? That one is doomed forever to be 10MBs without a Presto Plus?

I don't know all of the electronics / programming specifics, but I know the 10MB limit is hard coded into the CPU, memory manager, or something. The board uses 1/2 the bits as the CPU or something like that. I'd have to check and see if even RAM Doubler on the LC2 (effectively identical to the original LC) can go above 10MB but if I recall correctly, it maxed doubling to 10MB as well, meaning I don't think it could double the 10MB to 20MB back in the day. Again, I am being vague and could be half right, but I remember reading something on this.

Edit: similar info, the Classic II is based on the LC2, page here: https://68kmla.org/bb/index.php?threads/attempt-to-break-the-10mb-limit-on-the-classic-ii.3213/
 
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