Recent content by Golden Potato

This has got to be one major reason why my breadboard prototype didn’t work. I know I should just finalize the next schematic and lay out a PCB, but it’s very tempting to modify the breadboard circuit, reconnect it to the Mac, and see if it works…

My mind wandered back to this project while I was at work today, and I couldn't help but think about how the technique I'm borrowing from "Classic Mac Tech Docs v1.1" to generate additional ~CAS lines only allows for upper or lower byte of RAM to be accessed at one time. That didn't sit right...

I'm working on the schematic redraw, and I have an idea for connecting the ~OE pins on the DRAM ICs like the Mac Classic RAM expansion card without adding any new ICs. I'd like to hear opinions from others as the approach splits memory across the two DRAM ICs in a funny way. The Mac Classic...

Thanks! It can be a little meandering at time, but I find talking (or typing) my thoughts out loud helps me understand them better. Hopefully, it helps others too.

Agreed, that’s a great sign that it should work for this project! Thanks for sharing this. I saw a blurb in the schematic in the linked GitHub repository talking about using an AND gate to control the ~OE line to the RAM ICs based on either the upper or lower ~CAS lines being asserted rather...

Awesome! Okay, so I’m back to this chip. 😆

I’m having a hard time finding where these can be purchased. I found an alternative on Mouser, but it’s 3.3V only and the inputs are not 5V tolerant. A couple of level shifters would solve that issue. We would still need a 3.3V power supply. Unless you can point me to some readily available 5V...

What I meant in the part about refresh rates was more about the address lines than actual rates. I was originally confused about that chip having an A11 pin, because A10 should be the MSB for that size of memory chip. Then I noticed the little blurb in the datasheet block diagram regarding the...

We would need to use four of these 4Mb chips just to have the correct number of data bits, and I think it would end up providing 8MB of memory, half of it being wasted unless we tried to do something tricky and find some extra address space for a RAM disk? I don’t know much about that nor the...

I’m pretty sure I bought mine on eBay. I don’t reallly remember my reasoning for settling on that part other than the low price. I appreciate you searching for parts which are easier to obtain! This 1Mx16-bit (2MB?) chip you linked looks like it should work great, since it has separate lower...

This PDF talks a little about the SCSI section of the Mac Plus, and includes details on the memory map: https://ia800705.us.archive.org/26/items/Mac_Hardware_Info_Mac_Plus/Mac_Hardware_Info_Mac_Plus.pdf And here’s the schematic for the Mac Plus, which uses an additional Apple custom IC to...

I found this build thread for reverse engineering a MacSnap SCSI card. It uses some clever, slightly complicated, hacks to make it work using only the lines available at the ROM sockets, but I don’t think that’s necessary if we are already soldering leads to various points on the logic board...

A feature that the memory expansion board Adrian found on that 512K logic board was that you could hold the mouse button down at power on (like you would do to make the system eject a disk) to have the memory board disable itself leaving the system with only 512K of memory. System reset...

Adrian Black released a follow up video to the memory upgrade board on a Mac 512K logic board he was fixing up (I believe these are on his second channel). It got me thinking that bodge wires leading into a connector as a removal means for a memory upgrade mod isn’t such a bad way to go. Sure...

No I did not. I see that they (~CAS0 annd ~CAS1) aren’t necessary to take back to the logic board and could instead be pulled up high. I’m not sure if it would be necessary because original memory should be disabled as their ~RAS line is pulled high. Maybe the DRAMs still respond somehow to ~CAS...